Debian on Synology DS216

> It works perfectly.
> We can check if kwboot works indeed. But as I have
> the required tools to dump or flash the SPI NOR in
> place, it's not that risky for me to edit things
> to oblivion.

Cool!

Let's dump the mtds first to back it up and use for kwboot.

-bodhi
===========================
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Kwboot with stock mtd0

1. Dumping mtds

dd if=/dev/mtd0 of=mtd0.ds216 bs=1024k conv=sync
dd if=/dev/mtd1 of=mtd1.ds216 bs=7040k conv=sync
dd if=/dev/mtd2 of=mtd2.ds216 bs=64k conv=sync
dd if=/dev/mtd3 of=mtd3.ds216 bs=64k conv=sync

2. kwboot

- Here is an example of running kwboot.
- Download the latest kwboot here. Eventhough the kwboot comes with your Linux host distro is adequate most of the time, the latest version will work around some of the Armada SoC BootROM bugs.

And run it with mtd0.ds216

./kwboot  -t -B 115200 /dev/ttyUSB0 -b mtd0.ds216 -p

Power up the DS216. See if it is loaded and run.

-bodhi
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It just works

I followed your procedure with the stock kwboot of my debian 12 PC and it worked fine. I had to keep the power button pressed until kwboot stated loading. Any other way to power on the NAS ended up in a normal boot, ignoring kwboot.

robin@raketa:~$ sudo kwboot  -t -B 115200 /dev/ttyUSB0 -b mtd0.ds216 -p
[sudo] Mot de passe de robin : 
kwboot version 2023.01
Patching image boot signature to UART
Aligning image header to Xmodem block size
Sending boot message. Please reboot the target...|
Sending boot image header (84736 bytes)...
  0 % [......................................................................]
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 95 % [................................                                      ]
Done


General initialization - Version: 1.0.0
AVS selection from EFUSE disabled (Skip reading EFUSE values)
Overriding default AVS value to: 0x23
Detected Device ID 6820
High speed PHY - Version: 2.0

Init Synology board board SerDes lanes topology details:
 | Lane # | Speed|    Type     |
 ------------------------------|
 |   0    |  0   |  SGMII0     |
 |   1    |  6   |  SATA0      |
 |   2    |  6   |  SATA1      |
 |   4    |  5   |  USB3 HOST0 |
 |   5    |  5   |  USB3 HOST1 |
 -------------------------------
High speed PHY - Ended Successfully
DDR3 Training Sequence - Ver TIP-1.46.0
WARNING:Wrong configuration for pup #1 CS mask and CS mirroring for all pups should be the same
WARNING:Wrong configuration for pup #3 CS mask and CS mirroring for all pups should be the same
DDR3 Training Sequence - Switching XBAR Window to FastPath Window 
DDR3 Training Sequence - Ended Successfully

Sending boot image data (635832 bytes)...
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Done
Finishing transfer
[Type Ctrl-\ + c to quit]

 __   __                      _ _
|  \/  | __ _ _ ____   _____| | |
| |\/| |/ _` | '__\ \ / / _ \ | |
| |  | | (_| | |   \ V /  __/ | |
|_|  |_|\__,_|_|    \_/ \___|_|_|
         _   _     ____              _
        | | | |   | __ )  ___   ___ | |_ 
        | | | |___|  _ \ / _ \ / _ \| __| 
        | |_| |___| |_) | (_) | (_) | |_ 
         \___/    |____/ \___/ \___/ \__| 
 ** LOADER **


U-Boot 2013.01-g74a026b-dirty (Dec 30 2015 - 14:38:52) Marvell version: 2015_T1.0p16

Board: SYNO-DS216
SoC:   MV88F6820 Rev A0
       running 2 CPUs
CPU:   ARM Cortex A9 MPCore (Rev 1) LE
       CPU 0
       CPU    @ 1332 [MHz]
       L2     @ 666 [MHz]
       TClock @ 250 [MHz]
       DDR3    @ 666 [MHz]
       DDR3 32 Bit Width,FastPath Memory Access, DLB Enabled, ECC Disabled
DRAM:  512 MiB
MMC:   mv_sdh: 0
SF: Detected N25Q64 with page size 64 KiB, total 8 MiB
USB2.0 0: Host Mode
USB3.0 0: Host Mode
USB3.0 1: Host Mode

Map:   Code:			0x1ff3b000:0x1ffc915c
       BSS:			0x1ffef688
       Stack:			0x1fa2af20
       Heap:			0x1fa2b000:0x1ff3b000
       U-Boot Environment:	0x007e0000:0x007f0000 (SPI)

Board configuration detected:

Synology Model: DS216

Net:   
|  port  | Interface | PHY address  |
|--------|-----------|--------------|
| egiga0 |   SGMII   |     0x01     |
egiga0 [PRIME]
Press Ctrl+C to abort autoboot in 3 second
AHCI init for unit0
SATA link 0 timeout.
SATA link 1 timeout.

@Robin,

> It just works

>
> I followed your procedure with the stock kwboot of
> my debian 12 PC and it worked fine. I had to keep
> the power button pressed until kwboot stated
> loading. Any other way to power on the NAS ended
> up in a normal boot, ignoring kwboot.

Cool! that's a quirk worth knowing, will save people time trying to run kwboot. I'm not sure if the latest kwboot will work without this Power button trick (which might be a work around for a BootROM bug). I don't have to do this with my DS116.

OK, I think we can declare complete victory :) Please go ahead with your Installation Guide.

I've already added the DTS to the latest kernel, and will release it in linux-6.8.7-mvbeu-tld-1 version (if there is no serious patch going in stable kernel 6.8.7+).

-bodhi
===========================
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Hi Tony,

I'm currently preparing a complete guide that I will post here in a few days. There are few other minor quirks
I didn't mention previously that I will sum up in it, such as the fact that the stock u-boot only detects drives in the DISK 2 bay, even with an appropriate config. I hope you didn't missed my latest DTS edit (for the Seiko RTC) as the message landed at the very end of the first page.

About u-boot, it is very possible that they chose a 1333MHz DDR frequency because the SoC doesn't have a speed grade good enough for 1600MHz, as the core clock is 1333MHz too. I didn't find much info about Marvell SoC speed grades, but rayknight told me about it in the post I made about the DS214 u-boot. If it's the way it works, the same goes probably for the DS216.



Edited 1 time(s). Last edit at 04/18/2024 03:33AM by Robin.

> I'm currently preparing a complete guide that I
> will post here in a few days. There are few other
> minor quirks
> I didn't mention previously that I will sum up in
> it, such as the fact that the stock u-boot only
> detects drives in the DISK 2 bay, even with an
> appropriate config.

26  GPIO0 26       OUTPUT    HIGH         HDD1 power enable.         Dummy regulator 
27  GPIO0 27       OUTPUT    HIGH         HDD2 power enable.         Dummy regulator

Doesn't the GPIO 27 turn on the SATA0 bay?

We should also check GPIO 40

39  GPIO1 7        INPUT     LOW          HDD 1 present.                             
40  GPIO1 8        INPUT     LOW          HDD 2 present.

> I hope you didn't missed my
> latest DTS edit (for the Seiko RTC) as the message
> landed at the very end of the first page.

Yes, I got that one.

> About u-boot, it is very possible that they chose
> a 1333MHz DDR frequency because the SoC doesn't
> have a speed grade good enough for 1600MHz, as the
> core clock is 1333MHz too. I didn't find much info
> about Marvell SoC speed grades, but rayknight told
> me about it in
> the
> post I made about the DS214 u-boot. If it's
> the way it works, the same goes probably for the
> DS216.

The DDR speed rate is not relevant. Whatever the manufacturer determined to be a common denominator should be used. So in this case it is 1333MHz. To get it to run a true speed rating for a specific box might be possible, but out of scope.

-bodhi
===========================
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Those GPIOs turn their respective SATA bays properly under the stock u-boot. However, even though both drives are powered, only drives in the Disk 2 bay will be detected by u-boot and thus be bootable.
I think that the stock u-boot SATA config is just bad :
- Setting GPIO 26 and 27 HIGH powers on both drives under u-boot.
- Drives in Disk 1 bay are not detected no matter what.
- Drives in Disk 2 bay are detected if their spin-up time is rather quick.
- Drives in Disk 2 bay are detected on ahci0 by u-boot, but ahci1 by Linux and end up in /dev/sdb.

When it comes to spin-up time, SSDs and any HDD that isn't super slow will be detected. I use a Samsung 870 evo 500GB as my boot drive and it works perfectly fine with great performance (no entropy issue whatsoever).
I also used a few 2.5" HDDs without any issue during setup, and I also successfully tried a WD Red 3TB 3.5" HDD.
However, I have a WD Blue 500GB 3.5" with a slightly higher spin up time and I got no success with it.



Edited 2 time(s). Last edit at 04/19/2024 03:14AM by Robin.

> Those GPIOs turn their respective SATA bays
> properly under the stock u-boot. However, even
> though both drives are powered, only drives in the
> Disk 2 bay will be detected by u-boot and thus be
> bootable.

Have you tried to check and see if these are on?

39  GPIO1 7        INPUT     LOW          HDD 1 present.                             
40  GPIO1 8        INPUT     LOW          HDD 2 present.

Some old boards require u-boot to set both HDD present and Power Enable.

> I think that the stock u-boot SATA config is just
> bad :
> - Setting GPIO 26 and 27 HIGH powers on both
> drives under u-boot.
> - Drives in Disk 1 bay are not detected no matter
> what.

> - Drives in Disk 2 bay are detected if their
> spin-up time is rather quick.

Yes. There was a lack of logic in older u-boot to handle some SATA controller FW shortcoming.

> - Drives in Disk 2 bay are detected on ahci0 by
> u-boot, but ahci1 by Linux and end up in
> /dev/sdb.

This is the way it should be. This u-boot does not recognize the 1st one so it assigns the 2nd to port 0. But Linux has no problem seeing both.

> When it comes to spin-up time, SSDs and any HDD
> that isn't super slow will be detected. I use a
> Samsung 870 evo 500GB as my boot drive and it
> works perfectly fine with great performance (no
> entropy issue whatsoever).
> I also used a few 2.5" HDDs without any issue
> during setup, and I also successfully tried a WD
> Red 3TB 3.5" HDD.
> However, I have a WD Blue 500GB 3.5" with a
> slightly higher spin up time and I got no success
> with it.

Yes. It's a problem seen in a few older boards. Try a sleep period in betwen 2 scsi reset commands.

Instead of this command

scsi device 0;

Do

scsi reset; sleep 3; scsi reset

bump the sleep period up if 3 seconds is not enough.

-bodhi
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Please try the new kernel 6.8.7-mvebu-tld-1:

https://forum.doozan.com/read.php?2,32146

-bodhi
===========================
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Hi Robin,

Please try kwboot this initial version for the DS216 u-boot. But don't flash it yet. If all goes well, you can boot with the current envs. However, I have not finalized the default envs yet, so it will be posted later.

Download at Dropbox

uboot.2024.04-tld-1.ds216.bodhi.tar

md5:
a226ad573b3981d0f84bd42635b419b4
sha256:
712f71d706bdd397c5f1412e1a86a21cf012c2020f82df3763947d0a9862700a

There are 4 files in this tarball

uboot.2024.04-tld-1.ds216.kwb
boot.cmd
boot.scr
README.txt

-bodhi
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Hi Tony,
I've been busy for the last few days, hopefully I should have more time to try and improve things now.
Wow, it seems like you made a lot of progress on the u-boot side, I'll give it a shot.

Digging deeper in the Synology GPL tarballs, I get more confused about this code in the DS216 DTS :

	/* use only one pin for UART1, as mpp20 is used by sata0 */
	uart1_pins: uart-pins-1 {
		marvell,pins = "mpp19";
		marvell,function = "ua1";
	};

- It is clear that the synobios module needs to both transmit and receive from the PIC, so mpp20 should be UART1 RX. I will try to edit the DTS to see if I mpp20 can effectively act as UART1 RX.
- mpp20 is indeed defined under "sata0_pins" in armada-38x.dtsi, this is why i kept this code. What is the purpose of this single GPIO as the SATA interface uses SERDES lanes ? Is this supposed to be an enable or detect pin ?

I'll dig into the code to find what this pin is supposed to be. Any hints are welcome.



Edited 1 time(s). Last edit at 04/24/2024 04:02AM by Robin.

@Robin,

In the DS216 DTS, is there a reason why you did not use the same definition as the DS116 DTS regarding the serial nodes?

internal-regs {
			i2c@11000 {
				pinctrl-names = "default";
				pinctrl-0 = <&i2c0_pins>;
				status = "okay";
				clock-frequency = <100000>;

				eeprom@57 {
					compatible = "atmel,24c64";
					reg = <0x57>;
				};
			};

			serial@12000 {
				pinctrl-names = "default";
				pinctrl-0 = <&uart0_pins>;
				status = "okay";
			};

			serial@12100 {
				/* A PIC16F1829 is connected to uart1 at 9600 bps,
				 * and takes single-character orders :
				 *   "1" : power off // already handled by the poweroff node
				 *   "2" : short beep
				 *   "3" : long beep
				 *   "4" : turn the power LED ON
				 *   "5" : flash the power LED
				 *   "6" : turn the power LED OFF
				 *   "7" : turn the status LED OFF
				 *   "8" : turn the status LED ON
				 *   "9" : flash the status LED
				 *   "A" : flash the motherboard LED (D8)
				 *   "B" : turn the motherboard LED OFF
				 *   "C" : hard reset
				 */
				pinctrl-names = "default";
				pinctrl-0 = <&uart1_pins>;
				status = "okay";
			};

			poweroff@12100 {
				compatible = "synology,power-off";
				reg = <0x12100 0x100>;
				clocks = <&coreclk 0>;
			};

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Hi Tony,

Yes, the goal was to extend nodes already declared in armada-38x.dtsi instead of re-declaring them to avoid warning messages during the dtb compilation.
As for the smaller changes:
- There is no EEPROM in the ds216, and it may refer to non-existing hardware in the ds116 too. If that's the case, the whole i2c node could be removed for the ds116.
- I bumped the i2c frequency to 400kHz as it is the maximum frequency supported by the s35390a RTC when powered by more than 3 volts. It is the only i2c device on the bus, and it works perfectly with 400kHz.
- I added a node for the s35390a i2c RTC. I just checked the Synology GPL and the DS116 is indeed designed to use the marvell RTC with no correction, unlike the ds216.
- I think the last DTS i uploaded was missing the pinctrl definitions in the UART nodes, this is something I added later. I will upload my latest DTS after a bit of cleanup. This is not very important but it may avoid issues.
- I kept the poweroff node required by the qnap-poweroff driver. I moved the PIC comment section to the poweroff node to keep it close to the top of the file.

I think that's pretty much it.

U-Boot seems to work fine. As the envs are not finished yet it failed to boot on HDD and booted the stock kernel from SPI flash but otherwise it boots without major issues.

robin@raketa:~$ sudo kwboot  -t -B 115200 /dev/ttyUSB0 -b uboot.2024.04-tld-1.ds216.kwb -p
[sudo] Mot de passe de robin : 
kwboot version 2023.01
Patching image boot signature to UART
Sending boot message. Please reboot the target...\
Sending boot image header (100992 bytes)...
  0 % [......................................................................]
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 97 % [...................                                                   ]
Done

U-Boot SPL 2024.04-tld-1-00827-g90ac8d08ae-dirty (Apr 21 2024 - 22:09:45 -0700)
High speed PHY - Version: 2.0
Detected Device ID 6820
board SerDes lanes topology details:
 | Lane # | Speed |  Type       |
 --------------------------------
 |   0    |   0   | SGMII0	|
 |   1    |   6   | SATA0	|
 |   2    |   6   | SATA1	|
 |   4    |   5   | USB3 HOST0	|
 |   5    |   5   | USB3 HOST1	|
 --------------------------------
High speed PHY - Ended Successfully
mv_ddr: 14.0.0 
DDR3 Training Sequence - Switching XBAR Window to FastPath Window
mv_ddr: completed successfully
Trying to boot from BOOTROM
Returning to BootROM (return address 0xffff05c4)...

Sending boot image data (504632 bytes)...
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 99 % [.......................                                               ]
Done
Finishing transfer
[Type Ctrl-\ + c to quit]


U-Boot 2024.04-tld-1-00827-g90ac8d08ae-dirty (Apr 21 2024 - 22:09:45 -0700)
Synology DS216

SoC:   MV88F6820-A0 at 1332 MHz
DRAM:  512 MiB (666 MHz, 32-bit, ECC not enabled)
Core:  58 devices, 20 uclasses, devicetree: separate
MMC:   
Loading Environment from SPIFlash... SF: Detected n25q064 with page size 256 Bytes, erase size 4 KiB, total 8 MiB
OK
Model: Synology DS216
Net:   eth0: ethernet@70000
Hit any key to stop autoboot:  0 
scsi - SCSI sub-system

Usage:
scsi reset - reset SCSI controller
scsi info  - show available SCSI devices
scsi scan  - (re-)scan SCSI bus
scsi device [dev] - show or set current device
scsi part [dev] - print partition table of one or all SCSI devices
scsi read addr blk# cnt - read `cnt' blocks starting at block `blk#'
     to memory address `addr'
scsi write addr blk# cnt - write `cnt' blocks starting at block
     `blk#' from memory address `addr'
Booting Debian ...
loading uImage from raw HDD ...

Device 0: unknown device

scsi read: device 0 block # 20480, count 12032 ... loading uInitrd from raw HDD ...

Device 0: unknown device

scsi read: device 0 block # 40960, count 44800 ... Wrong Image Type for bootm command
ERROR -91: can't get kernel image!
Booting Stock OS ...
SF: Detected n25q064 with page size 256 Bytes, erase size 4 KiB, total 8 MiB
device 0 offset 0xf0000, size 0x2d0000
SF: 2949120 bytes @ 0xf0000 Read: OK
device 0 offset 0x3c0000, size 0x410000
SF: 4259840 bytes @ 0x3c0000 Read: OK
device 0 offset 0xe0000, size 0x10000
SF: 65536 bytes @ 0xe0000 Read: OK
## Booting kernel from Legacy Image at 02000000 ...
   Image Name:   Linux-3.10.105
   Created:      2023-03-21  14:22:52 UTC
   Image Type:   ARM Linux Kernel Image (uncompressed)
   Data Size:    2567672 Bytes = 2.4 MiB
   Load Address: 00008000
   Entry Point:  00008000
   Verifying Checksum ... OK
## Loading init Ramdisk from Legacy Image at 03000000 ...
   Image Name:   synology_armada38x_ds216 25556
   Created:      2023-04-21  10:30:47 UTC
   Image Type:   ARM Linux RAMDisk Image (uncompressed)
   Data Size:    3527673 Bytes = 3.4 MiB
   Load Address: 08000000
   Entry Point:  08000000
   Verifying Checksum ... OK
## Flattened Device Tree blob at 01000000
   Booting using the fdt blob at 0x1000000
Working FDT set to 1000000


Starting kernel ...

   Loading Kernel Image to 8000
   Loading Device Tree to 1eb5d000, end 1eb63a43 ... OK
Working FDT set to 1eb5d000

Starting kernel ...

Just a quick note about the LAN LED behavior while I have this in mind.

As I previously mentioned, the LAN led doesn't exhibit the expected behavior once the eth0 link is up. I inspected many things, including the Marvell PHY driver "/drivers/net/phy/marvell.c".
It seems that its default config is to use the LED[0] as the 1000M link LED, and it is indeed the case here as the LED goes off when the link is only 100Mbps.
The driver exposes an other config but it's not relevant for this box, a new config should be added to the driver with LED[0] set as activity LED.
This is completely out of the scope of this topic but one may find interesting to know that this issue isn't related to the device tree.

Cool! It works very well for the first try.

Now let's run some tests and make it boot with the script (from the tarball).

Boot with stock u-boot, login to Debian,

cp -a boot.scr /boot/
sync

Run kwboot again with the new u-boot, and reboot (or shutdown and power up) the box. Interrupt u-boot count down,

dm tree
scsi reset
scsi part
usb reset
usb info
ping <router IP address>
mdio list
mii info
dm tree

And then boot with the script. What we do below is simulating a corrupt/uninitialzed envs on flash so it will boot with the script using standard boot (bootstd). It's a non-destructive test.

env default -a
printenv
boot

Log into Debian, and observe SATA, and USB, SPI flash, RTC... see if anything change (should be the same as before).

dmesg

-bodhi
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Edited 1 time(s). Last edit at 04/25/2024 02:31PM by bodhi.

> Just a quick note about the LAN LED behavior while
> I have this in mind.
>
> As I previously mentioned, the LAN led doesn't
> exhibit the expected behavior once the eth0 link
> is up. I inspected many things, including the
> Marvell PHY driver "/drivers/net/phy/marvell.c".
> It seems that its default config is to use the
> LED[0] as the 1000M link LED, and it is indeed the
> case here as the LED goes off when the link is
> only 100Mbps.

> The driver exposes an other config but it's not
> relevant for this box, a new config should be
> added to the driver with LED[0] set as activity
> LED.
> This is completely out of the scope of this topic
> but one may find interesting to know that this
> issue isn't related to the device tree.

Usually, there is a trigger that we need to set to make the LAN LED light up and flash correctly. Normally it is Green for 1000Mbs and Amber for lower speed. But this is cosmetic so I did not bother to take a closer look. As you've found:

16  GPIO0 16       OUTPUT    HIGH         Enable ethernet PHY LED.

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> Yes, the goal was to extend nodes already declared
> in armada-38x.dtsi instead of re-declaring them to
> avoid warning messages during the dtb compilation.

Yes I saw that you have:

&uart0 {
        status = "okay";
};

&uart1 {
        status = "okay";
};

Shouldn't the pinctl info are specified in these 2 nodes? or were they already specified in the include chain?

-bodhi
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