luo
Marvell development board (db-mv784mp-gp) cannot start Debian
October 14, 2021 12:10AM
Compile and generate the u-boot-spl.kwb file using the default configuration of the mainline uboot (version 2017.03), write it to the spiflash and start the log:

BootROM 1.20
Booting from SPI flash

U-Boot SPL 2017.03 (Oct 13 2021 - 21:01:08)
High speed PHY - Version: 2.1.5 (COM-PHY-V20)
High speed PHY - Ended Successfully
DDR3 Training Sequence - Ver 5.7.4
DDR3 Training Sequence - Number of DIMMs detected: 1
DDR3 Training Sequence - Ended Successfully
Trying to boot from SPI


U-Boot 2017.03 (Oct 13 2021 - 21:01:08 -0700)

SoC:   MV78460-B0 at 1600 MHz
I2C:   ready
DRAM:  4 GiB (800 MHz, ECC not enabled)
NAND:  failed to scan nand at cs 0
0 MiB
SF: Detected n25q128 with page size 256 Bytes, erase size 64 KiB, total 16 MiB
Model: Marvell Armada XP Development Board DB-MV784MP-GP
Board: Marvell DB-MV784MP-GP
Net:   eth0: ethernet@70000, eth1: ethernet@74000, eth2: ethernet@30000, eth3: ethernet@34000
Hit any key to stop autoboot:  0 
=> pri
baudrate=115200
bootargs=console=ttyS0,115200 rootdelay=10 earlyprintk=serial
bootcmd=sata init; ext2load sata 0:1 0x1000000 uImage; ext2load sata 0:1 0x2000000 uIinitrd; bootm 0x1000000 0x2000000
bootdelay=3
eth1addr=00:50:43:2e:28:68
eth2addr=00:50:43:28:68:22
eth3addr=00:50:43:68:22:2e
ethact=ethernet@70000
ethaddr=00:11:32:42:ac:cb
fdtcontroladdr=bfb44d98
fileaddr=800000
filesize=4fe87b
ipaddr=10.0.0.100
loadaddr=0x800000
serverip=10.0.0.10
stderr=serial@12000
stdin=serial@12000
stdout=serial@12000

Environment size: 545/65532 bytes
=>

Start Debian kernel log
=> boot
5236859 bytes read in 118 ms (42.3 MiB/s)
** File not found uIinitrd **
## Booting kernel from Legacy Image at 01000000 ...
   Image Name:   Linux-5.13.8-mvebu-tld-1
   Image Type:   ARM Linux Kernel Image (uncompressed)
   Data Size:    5236795 Bytes = 5 MiB
   Load Address: 00008000
   Entry Point:  00008000
   Verifying Checksum ... OK
Wrong Ramdisk Image Format
Ramdisk image is corrupt or invalid
=> bootm 0x1000000
## Booting kernel from Legacy Image at 01000000 ...
   Image Name:   Linux-5.13.8-mvebu-tld-1
   Image Type:   ARM Linux Kernel Image (uncompressed)
   Data Size:    5236795 Bytes = 5 MiB
   Load Address: 00008000
   Entry Point:  00008000
   Verifying Checksum ... OK
   Loading Kernel Image ... OK

Starting kernel ...

Uncompressing Linux... done, booting the kernel.
[    0.000000][    T0] Booting Linux on physical CPU 0x0
[    0.000000][    T0] Linux version 5.13.8-mvebu-tld-1 (root@tldDebian) (gcc (Debian 8.3.0-6) 8.3.0, GNU ld (GNU Binutils for Debian) 2.31.1) #1.0 SMP PREEMPT Sat Aug 7 14:58:41 PDT 2021
[    0.000000][    T0] CPU: ARMv7 Processor [562f5842] revision 2 (ARMv7), cr=10c5387d
[    0.000000][    T0] CPU: div instructions available: patching division code
[    0.000000][    T0] CPU: PIPT / VIPT nonaliasing data cache, PIPT instruction cache
[    0.000000][    T0] OF: fdt: Machine model: Marvell Armada XP Development Board DB-MV784MP-GP
[    0.000000][    T0] printk: bootconsole [earlycon0] enabled
[    0.000000][    T0] Memory policy: Data cache writealloc
[    0.000000][    T0] Zone ranges:
[    0.000000][    T0]   Normal   [mem 0x0000000000000000-0x000000002fffffff]
[    0.000000][    T0]   HighMem  [mem 0x0000000030000000-0x00000000ffffefff]
[    0.000000][    T0] Movable zone start for each node
[    0.000000][    T0] Early memory node ranges
[    0.000000][    T0]   node   0: [mem 0x0000000000000000-0x00000000ffffefff]
[    0.000000][    T0] Initmem setup node 0 [mem 0x0000000000000000-0x00000000ffffefff]
[    0.000000][    T0] percpu: Embedded 21 pages/cpu s54668 r8192 d23156 u86016
[    0.000000][    T0] Built 1 zonelists, mobility grouping on.  Total pages: 1047039
[    0.000000][    T0] Kernel command line: console=ttyS0,115200 rootdelay=10 earlyprintk=serial
[    0.000000][    T0] Dentry cache hash table entries: 131072 (order: 7, 524288 bytes, linear)
[    0.000000][    T0] Inode-cache hash table entries: 65536 (order: 6, 262144 bytes, linear)
[    0.000000][    T0] mem auto-init: stack:off, heap alloc:on, heap free:off
[    0.000000][    T0] Memory: 4142088K/4194300K available (11264K kernel code, 1483K rwdata, 3112K rodata, 1024K init, 325K bss, 52212K reserved, 0K cma-reserved, 3407856K highmem)
[    0.000000][    T0] random: get_random_u32 called from ____cache_alloc+0x404/0x78c with crng_init=0
[    0.000000][    T0] trace event string verifier disabled
[    0.000000][    T0] rcu: Preemptible hierarchical RCU implementation.
[    0.000000][    T0]  Trampoline variant of Tasks RCU enabled.
[    0.000000][    T0]  Tracing variant of Tasks RCU enabled.
[    0.000000][    T0] rcu: RCU calculated value of scheduler-enlistment delay is 10 jiffies.
[    0.000000][    T0] NR_IRQS: 16, nr_irqs: 16, preallocated irqs: 16
[    0.000000][    T0] ------------[ cut here ]------------
[    0.000000][    T0] kernel BUG at drivers/irqchip/irq-armada-370-xp.c:752!
[    0.000000][    T0] Internal error: Oops - BUG: 0 [#1] PREEMPT SMP ARM
[    0.000000][    T0] Modules linked in:
[    0.000000][    T0] CPU: 0 PID: 0 Comm: swapper/0 Not tainted 5.13.8-mvebu-tld-1 #1.0
[    0.000000][    T0] Hardware name: Marvell Armada 370/XP (Device Tree)
[    0.000000][    T0] PC is at armada_370_xp_mpic_of_init+0x78/0x37c
[    0.000000][    T0] LR is at cpu_cache_get+0xc/0x20
[    0.000000][    T0] pc : [<c1024fcc>]    lr : [<c02a0c78>]    psr: 600000d3
[    0.000000][    T0] sp : c1101ec8  ip : f1020ccf  fp : c12618f0
[    0.000000][    T0] r10: c0e899f1  r9 : c1261902  r8 : c1101f54
[    0.000000][    T0] r7 : c1109fc8  r6 : 00000000  r5 : edfef578  r4 : c180d7c0
[    0.000000][    T0] r3 : 00000000  r2 : 00000000  r1 : c0dd394b  r0 : 00000000
[    0.000000][    T0] Flags: nZCv  IRQs off  FIQs off  Mode SVC_32  ISA ARM  Segment none
[    0.000000][    T0] Control: 10c5387d  Table: 0000406a  DAC: 00000051
[    0.000000][    T0] Register r0 information: NULL pointer
[    0.000000][    T0] Register r1 information: non-slab/vmalloc memory
[    0.000000][    T0] Register r2 information: NULL pointer
[    0.000000][    T0] Register r3 information: NULL pointer
[    0.000000][    T0] Register r4 information: slab kmalloc-64 start c180d7c0 pointer offset 0 size 64
[    0.000000][    T0] Register r5 information: non-slab/vmalloc memory
[    0.000000][    T0] Register r6 information: NULL pointer
[    0.000000][    T0] Register r7 information: non-slab/vmalloc memory
[    0.000000][    T0] Register r8 information: non-slab/vmalloc memory
[    0.000000][    T0] Register r9 information: non-slab/vmalloc memory
[    0.000000][    T0] Register r10 information: non-slab/vmalloc memory
[    0.000000][    T0] Register r11 information: non-slab/vmalloc memory
[    0.000000][    T0] Register r12 information: non-paged memory
[    0.000000][    T0] Process swapper/0 (pid: 0, stack limit = 0x(ptrval))
[    0.000000][    T0] Stack: (0xc1101ec8 to 0xc1102000)
[    0.000000][    T0] 1ec0:                   00000000 00000000 00000004 00000000 0000006d f1020a00
[    0.000000][    T0] 1ee0: f1020ccf edfef5e4 00000200 00000000 00000000 00000000 00000000 f1021070
[    0.000000][    T0] 1f00: f10210c7 edfef5e4 00000200 00000000 00000000 00000000 00000000 00000000
[    0.000000][    T0] 1f20: c180d7c0 00000000 c1101f54 c1101f5c c1101f54 c1261902 c0e899f1 c1035a30
[    0.000000][    T0] 1f40: c1837e00 00000000 0000003f c1109fc8 00000000 c1101f54 c1101f54 c1101f5c
[    0.000000][    T0] 1f60: c1101f5c 00000000 c1837e00 c1042f48 ffffffff c1273000 00000000 efffcc40
[    0.000000][    T0] 1f80: c1273000 efffcc00 c1042000 c1009874 c1042f48 c100326c c12a256c c100107c
[    0.000000][    T0] 1fa0: ffffffff ffffffff 00000000 c10005a0 c1109fc8 c1109fc0 c1042f58 00000035
[    0.000000][    T0] 1fc0: c1042f58 00000000 00000000 00000000 00000000 c1000330 00000051 10c0387d
[    0.000000][    T0] 1fe0: 00000000 0176d3d8 562f5842 10c5387d 00000000 00000000 00000000 00000000
[    0.000000][    T0] [<c1024fcc>] (armada_370_xp_mpic_of_init) from [<c1035a30>] (of_irq_init+0x1f0/0x300)
[    0.000000][    T0] [<c1035a30>] (of_irq_init) from [<c1009874>] (mvebu_init_irq+0x8/0x64)
[    0.000000][    T0] [<c1009874>] (mvebu_init_irq) from [<c100326c>] (init_IRQ+0x68/0x78)
[    0.000000][    T0] [<c100326c>] (init_IRQ) from [<c100107c>] (start_kernel+0x52c/0x86c)
[    0.000000][    T0] [<c100107c>] (start_kernel) from [<00000000>] (0x0)
[    0.000000][    T0] Code: e59f02d8 ebc42dbf e3500000 1a000001 (e7f001f2) 
[    0.000000][    T0] ---[ end trace aa3fe55bef28eab3 ]---
[    0.000000][    T0] Kernel panic - not syncing: Attempted to kill the idle task!
[    0.000000][    T0] ---[ end Kernel panic - not syncing: Attempted to kill the idle task! ]---

Now I think there may be the following places

1、DTS file does not match circuit board

1)、Memory definition error (originally installed 8GB memory, I installed 4GB memory)
2)、Internal register configuration error(Can I view it in uboot? What command do you use?)
Contents of armada-xp-gp.dts file in uboot version 2017.03:
/*
 * Device Tree file for Marvell Armada XP development board
 * (DB-MV784MP-GP)
 *
 * Copyright (C) 2013-2014 Marvell
 *
 * Lior Amsalem <alior@marvell.com>
 * Gregory CLEMENT <gregory.clement@free-electrons.com>
 * Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
 *
 * This file is dual-licensed: you can use it either under the terms
 * of the GPL or the X11 license, at your option. Note that this dual
 * licensing only applies to this file, and not this project as a
 * whole.
 *
 *  a) This file is free software; you can redistribute it and/or
 *     modify it under the terms of the GNU General Public License as
 *     published by the Free Software Foundation; either version 2 of the
 *     License, or (at your option) any later version.
 *
 *     This file is distributed in the hope that it will be useful
 *     but WITHOUT ANY WARRANTY; without even the implied warranty of
 *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 *     GNU General Public License for more details.
 *
 * Or, alternatively
 *
 *  b) Permission is hereby granted, free of charge, to any person
 *     obtaining a copy of this software and associated documentation
 *     files (the "Software"), to deal in the Software without
 *     restriction, including without limitation the rights to use
 *     copy, modify, merge, publish, distribute, sublicense, and/or
 *     sell copies of the Software, and to permit persons to whom the
 *     Software is furnished to do so, subject to the following
 *     conditions:
 *
 *     The above copyright notice and this permission notice shall be
 *     included in all copies or substantial portions of the Software.
 *
 *     THE SOFTWARE IS PROVIDED , WITHOUT WARRANTY OF ANY KIND
 *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
 *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
 *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
 *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY
 *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
 *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
 *     OTHER DEALINGS IN THE SOFTWARE.
 *
 * Note: this Device Tree assumes that the bootloader has remapped the
 * internal registers to 0xf1000000 (instead of the default
 * 0xd0000000). The 0xf1000000 is the default used by the recent,
 * DT-capable, U-Boot bootloaders provided by Marvell. Some earlier
 * boards were delivered with an older version of the bootloader that
 * left internal registers mapped at 0xd0000000. If you are in this
 * situation, you should either update your bootloader (preferred
 * solution) or the below Device Tree should be adjusted.
 */

/dts-v1/;
#include <dt-bindings/gpio/gpio.h>
#include "armada-xp-mv78460.dtsi"

/ {
	model = "Marvell Armada XP Development Board DB-MV784MP-GP";
	compatible = "marvell,axp-gp", "marvell,armadaxp-mv78460", "marvell,armadaxp", "marvell,armada-370-xp";

	chosen {
		stdout-path = "serial0:115200n8";
	};

	aliases {
		spi0 = &spi0;
	};

	memory {
		device_type = "memory";
		/*
                 * 8 GB of plug-in RAM modules by default.The amount
                 * of memory available can be changed by the
                 * bootloader according the size of the module
                 * actually plugged. However, memory between
                 * 0xF0000000 to 0xFFFFFFFF cannot be used, as it is
                 * the address range used for I/O (internal registers,
                 * MBus windows).
		 */
		reg = <0x00000000 0x00000000 0x00000000 0xf0000000>,
		      <0x00000001 0x00000000 0x00000001 0x00000000>;
	};

	cpus {
		pm_pic {
			ctrl-gpios = <&gpio0 16 GPIO_ACTIVE_LOW>,
				     <&gpio0 17 GPIO_ACTIVE_LOW>,
				     <&gpio0 18 GPIO_ACTIVE_LOW>;
		};
	};

	soc {
		ranges = <MBUS_ID(0xf0, 0x01) 0 0 0xf1000000 0x100000
			  MBUS_ID(0x01, 0x1d) 0 0 0xfff00000 0x100000
			  MBUS_ID(0x01, 0x2f) 0 0 0xf0000000 0x1000000>;

		devbus-bootcs {
			status = "okay";

			/* Device Bus parameters are required */

			/* Read parameters */
			devbus,bus-width    = <16>;
			devbus,turn-off-ps  = <60000>;
			devbus,badr-skew-ps = <0>;
			devbus,acc-first-ps = <124000>;
			devbus,acc-next-ps  = <248000>;
			devbus,rd-setup-ps  = <0>;
			devbus,rd-hold-ps   = <0>;

			/* Write parameters */
			devbus,sync-enable = <0>;
			devbus,wr-high-ps  = <60000>;
			devbus,wr-low-ps   = <60000>;
			devbus,ale-wr-ps   = <60000>;

			/* NOR 16 MiB */
			nor@0 {
				compatible = "cfi-flash";
				reg = <0 0x1000000>;
				bank-width = <2>;
			};
		};

		pcie-controller {
			status = "okay";

			/*
			 * The 3 slots are physically present as
			 * standard PCIe slots on the board.
			 */
			pcie@1,0 {
				/* Port 0, Lane 0 */
				status = "okay";
			};
			pcie@9,0 {
				/* Port 2, Lane 0 */
				status = "okay";
			};
			pcie@10,0 {
				/* Port 3, Lane 0 */
				status = "okay";
			};
		};

		internal-regs {
			serial@12000 {
				status = "okay";
				u-boot,dm-pre-reloc;
			};
			serial@12100 {
				status = "okay";
			};
			serial@12200 {
				status = "okay";
			};
			serial@12300 {
				status = "okay";
			};
			pinctrl {
				pinctrl-0 = <&pic_pins>;
				pinctrl-names = "default";
				pic_pins: pic-pins-0 {
					marvell,pins = "mpp16", "mpp17",
						       "mpp18";
					marvell,function = "gpio";
				};
			};
			sata@a0000 {
				nr-ports = <2>;
				status = "okay";
			};

			mdio {
				phy0: ethernet-phy@0 {
					reg = <16>;
				};

				phy1: ethernet-phy@1 {
					reg = <17>;
				};

				phy2: ethernet-phy@2 {
					reg = <18>;
				};

				phy3: ethernet-phy@3 {
					reg = <19>;
				};
			};

			ethernet@70000 {
				status = "okay";
				phy = <&phy0>;
				phy-mode = "qsgmii";
			};
			ethernet@74000 {
				status = "okay";
				phy = <&phy1>;
				phy-mode = "qsgmii";
			};
			ethernet@30000 {
				status = "okay";
				phy = <&phy2>;
				phy-mode = "qsgmii";
			};
			ethernet@34000 {
				status = "okay";
				phy = <&phy3>;
				phy-mode = "qsgmii";
			};

			/* Front-side USB slot */
			usb@50000 {
				status = "okay";
			};

			/* Back-side USB slot */
			usb@51000 {
				status = "okay";
			};

			spi0: spi@10600 {
				status = "okay";
				u-boot,dm-pre-reloc;

				spi-flash@0 {
					u-boot,dm-pre-reloc;
					#address-cells = <1>;
					#size-cells = <1>;
					compatible = "n25q128a13", "jedec,spi-nor";
					reg = <0>; /* Chip select 0 */
					spi-max-frequency = <108000000>;
				};
			};

			nand@d0000 {
				status = "okay";
				num-cs = <1>;
				marvell,nand-keep-config;
				marvell,nand-enable-arbiter;
				nand-on-flash-bbt;
			};
		};
	};
};
luo
Re: Marvell development board (db-mv784mp-gp) cannot start Debian
October 14, 2021 02:58AM
In the latest mainline uboot, compile the u-boot-spl.kwb file using the default configuration. Start uboot successfully, but an error is reported when loading the file into memory:
U-Boot 2021.10 (Oct 14 2021 - 00:40:12 -0700)

SoC:   MV78460-B0 at 1600 MHz
I2C:   ready
DRAM:  4 GiB (800 MHz, 64-bit, ECC not enabled)
NAND:  0 MiB
Loading Environment from SPIFlash... SF: Detected n25q128a13 with page size 256 Bytes, erase size 4 KiB, total 16 MiB
OK
Model: Marvell Armada XP Development Board DB-MV784MP-GP
Board: Marvell DB-MV784MP-GP
Net:   eth0: ethernet@70000, eth1: ethernet@74000, eth2: ethernet@30000, eth3: ethernet@34000
Hit any key to stop autoboot:  0 
=> tftp 0x80000 uImage
Unknown command 'tftp' - try 'help'
=> tftpboot 0x80000 uImage
88E1545 Initialized
ethernet@70000 Waiting for PHY auto negotiation to complete..... done
Using ethernet@70000 device
TFTP from server 10.0.0.10; our IP address is 10.0.0.100
Filename 'uImage'.

TFTP error: trying to overwrite reserved memory...
=> bdinfo
boot_params = 0x00000100
DRAM bank   = 0x00000000
-> start    = 0x00000000
-> size     = 0x80000000
DRAM bank   = 0x00000001
-> start    = 0x80000000
-> size     = 0x80000000
flashstart  = 0x00000000
flashsize   = 0x00000000
flashoffset = 0x00000000
baudrate    = 115200 bps
relocaddr   = 0xbff6c000
reloc off   = 0xbf76c000
Build       = 32-bit
current eth = ethernet@70000
ethaddr     = 00:11:32:42:ac:cb
IP addr     = 10.0.0.100
fdt_blob    = 0xbfb575a0
new_fdt     = 0xbfb575a0
fdt_size    = 0x00004920
lmb_dump_all:
 memory.cnt  = 0x1
 memory[0]	[0x80000000-0x7fffffff], 0x00000000 bytes flags: 0
 reserved.cnt  = 0x1
 reserved[0]	[0xbfb55b74-0xbfffffff], 0x004aa48c bytes flags: 0
arch_number = 0x00000000
TLB addr    = 0xbfff0000
irq_sp      = 0xbfb57590
sp start    = 0xbfb57580
Early malloc usage: 2cc / 2000



Edited 1 time(s). Last edit at 10/14/2021 03:07AM by luo.
Re: Marvell development board (db-mv784mp-gp) cannot start Debian
October 14, 2021 03:28PM
Quote

=> tftpboot 0x80000 uImage


0x80000 is too low. Try 0x800000 or higher.

-bodhi
===========================
Forum Wiki
bodhi's corner
luo
Re: Marvell development board (db-mv784mp-gp) cannot start Debian
October 16, 2021 05:03AM
hi bodhi
I have tried many addresses, including 0x800000, 0x2000000, 0x8000000, etc. errors are prompted in the main line uboot Version (after 2018)

I now suspect that the memory configuration in DTS is wrong. I use 4GB

Can you help me explain the meaning of the following definitions in the DTS file

memory {
		device_type = "memory";
		/*
                 * 8 GB of plug-in RAM modules by default.The amount
                 * of memory available can be changed by the
                 * bootloader according the size of the module
                 * actually plugged. However, memory between
                 * 0xF0000000 to 0xFFFFFFFF cannot be used, as it is
                 * the address range used for I/O (internal registers,
                 * MBus windows).
		 */
		reg = <0x00000000 0x00000000 0x00000000 0xf0000000>,
		      <0x00000001 0x00000000 0x00000001 0x00000000>;
soc {
		ranges = <MBUS_ID(0xf0, 0x01) 0 0 0xf1000000 0x100000
			  MBUS_ID(0x01, 0x1d) 0 0 0xfff00000 0x100000
			  MBUS_ID(0x01, 0x2f) 0 0 0xf0000000 0x1000000
			  MBUS_ID(0x09, 0x09) 0 0 0xf1100000 0x10000
			  MBUS_ID(0x09, 0x05) 0 0 0xf1110000 0x10000
			  MBUS_ID(0x0c, 0x04) 0 0 0xf1200000 0x100000>;

luo
Re: Marvell development board (db-mv784mp-gp) cannot start Debian
October 16, 2021 05:30AM
If I use 4gb memory as I do now, how should my memory address configure the DTS file, and how should I configure mbus?
Re: Marvell development board (db-mv784mp-gp) cannot start Debian
October 16, 2021 03:02PM
luo,

No idea.

But I did have a suggestion for you about how you can get to the point that you can run Debian with stock u-boot.

https://forum.doozan.com/read.php?3,126044,126164#msg-126164

That's all I can do to help you.

-bodhi
===========================
Forum Wiki
bodhi's corner
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