HOW2: Repair Pogo E02 with Raspberry PI (1,2 or 3) JTAG and OpenOCD May 08, 2015 01:59PM |
Registered: 10 years ago Posts: 94 |
sudo apt-get update sudo apt-get install picocom sudo apt-get install -y autoconf automake texinfo libtool libftdi-dev sudo apt-get install libusb-1.0 libusb-dev sudo apt-get install mtd-utils u-boot-tools git clone --recursive git://git.code.sf.net/p/openocd/code openocd-git && cd openocd-git
{
./bootstrap &&\
./configure --enable-bcm2835gpio \
--enable-buspirate \
--enable-maintainer-mode \
--disable-werror \
--enable-openjtag_ftdi \
--prefix=/usr\
&&\
make
} > openocd_build.log 2>&1
install with:
sudo make install cd ..when Installation is finished create a file called pogo.cfg
sudo touch /usr/share/openocd/scripts/board/pogo.cfg sudo nano /usr/share/openocd/scripts/board/pogo.cfgand fill it with the following content:
# Pogoplug E02 # modification joerg_999 14.03.2016 # use this pogo.cfg taken from sheevaplug to use with Raspi direct or Buspirate jtag adapter # use raspberrypi-native mode # we use the Pins from SPI Interface (violett) 19,21,23,26 and 22, + 20 for GND # see GPIO schematic Raspi Raspi GPIO # source [find interface/buspirate.cfg] # source [find interface/sysfsgpio-raspberrypi.cfg] source [find interface/raspberrypi123-native.cfg] source [find target/feroceon.cfg] $_TARGETNAME configure \ -work-area-phys 0x100000 \ -work-area-size 65536 \ -work-area-backup 0 #arm7_9 dcc_downloads enable # this assumes the hardware default peripherals location before u-Boot moves it set _FLASHNAME $_CHIPNAME.flash nand device $_FLASHNAME orion 0 0xd8000000 proc pogo_init { } { # We need to assert DBGRQ while holding nSRST down. # However DBGACK will be set only when nSRST is released. # Furthermore, the JTAG interface doesn't respond at all when # the CPU is in the WFI (wait for interrupts) state, so it is # possible that initial tap examination failed. So let's # re-examine the target again here when nSRST is asserted which # should then succeed. jtag_reset 0 1 feroceon.cpu arp_examine halt 0 jtag_reset 0 0 wait_halt arm mcr 15 0 0 1 0 0x00052078 mww 0xD0001400 0x43000C30 ;# DDR SDRAM Configuration Register mww 0xD0001404 0x39543000 ;# Dunit Control Low Register mww 0xD0001408 0x22125451 ;# DDR SDRAM Timing (Low) Register mww 0xD000140C 0x00000833 ;# DDR SDRAM Timing (High) Register mww 0xD0001410 0x000000CC ;# DDR SDRAM Address Control Register mww 0xD0001414 0x00000000 ;# DDR SDRAM Open Pages Control Register mww 0xD0001418 0x00000000 ;# DDR SDRAM Operation Register mww 0xD000141C 0x00000C52 ;# DDR SDRAM Mode Register mww 0xD0001420 0x00000042 ;# DDR SDRAM Extended Mode Register mww 0xD0001424 0x0000F17F ;# Dunit Control High Register mww 0xD0001428 0x00085520 ;# Dunit Control High Register mww 0xD000147c 0x00008552 ;# Dunit Control High Register mww 0xD0001504 0x0FFFFFF1 ;# CS0n Size Register mww 0xD0001508 0x10000000 ;# CS1n Base Register mww 0xD000150C 0x0FFFFFF5 ;# CS1n Size Register mww 0xD0001514 0x00000000 ;# CS2n Size Register mww 0xD000151C 0x00000000 ;# CS3n Size Register mww 0xD0001494 0x003C0000 ;# DDR2 SDRAM ODT Control (Low) Register mww 0xD0001498 0x00000000 ;# DDR2 SDRAM ODT Control (High) REgister mww 0xD000149C 0x0000F80F ;# DDR2 Dunit ODT Control Register mww 0xD0001480 0x00000001 ;# DDR SDRAM Initialization Control Register mww 0xD0020204 0x00000000 ;# Main IRQ Interrupt Mask Register mww 0xD0020204 0x00000000 ;# " mww 0xD0020204 0x00000000 ;# " mww 0xD0020204 0x00000000 ;# " mww 0xD0020204 0x00000000 ;# " mww 0xD0020204 0x00000000 ;# " mww 0xD0020204 0x00000000 ;# " mww 0xD0020204 0x00000000 ;# " mww 0xD0020204 0x00000000 ;# " mww 0xD0020204 0x00000000 ;# " mww 0xD0020204 0x00000000 ;# " mww 0xD0020204 0x00000000 ;# " mww 0xD0020204 0x00000000 ;# " mww 0xD0020204 0x00000000 ;# " mww 0xD0020204 0x00000000 ;# " mww 0xD0020204 0x00000000 ;# " mww 0xD0020204 0x00000000 ;# " mww 0xD0020204 0x00000000 ;# " mww 0xD0020204 0x00000000 ;# " mww 0xD0020204 0x00000000 ;# " mww 0xD0020204 0x00000000 ;# " mww 0xD0020204 0x00000000 ;# " mww 0xD0020204 0x00000000 ;# " mww 0xD0020204 0x00000000 ;# " mww 0xD0020204 0x00000000 ;# " mww 0xD0020204 0x00000000 ;# " mww 0xD0020204 0x00000000 ;# " mww 0xD0020204 0x00000000 ;# " mww 0xD0020204 0x00000000 ;# " mww 0xD0020204 0x00000000 ;# " mww 0xD0020204 0x00000000 ;# " mww 0xD0020204 0x00000000 ;# " mww 0xD0020204 0x00000000 ;# " mww 0xD0020204 0x00000000 ;# " mww 0xD0020204 0x00000000 ;# " mww 0xD0020204 0x00000000 ;# " mww 0xD0020204 0x00000000 ;# " mww 0xD0010000 0x01111111 ;# MPP 0 to 7 mww 0xD0010004 0x11113322 ;# MPP 8 to 15 mww 0xD0010008 0x00001111 ;# MPP 16 to 23 mww 0xD0010418 0x003E07CF ;# NAND Read Parameters REgister mww 0xD001041C 0x000F0F0F ;# NAND Write Parameters Register mww 0xD0010470 0x01C7D943 ;# NAND Flash Control Register } proc pogo_reflash_uboot { } { # reflash the u-Boot binary and reboot into it pogo_init nand probe 0 nand erase 0 0x0 0xa0000 nand write 0 uboot.kwb 0 oob_softecc_kw resume } proc pogo_reflash_uboot_env { } { # reflash the u-Boot environment variables area pogo_init nand probe 0 nand erase 0 0xc0000 0x20000 nand write 0 uboot-env.bin 0xc0000 oob_softecc_kw resume } proc pogo_load_uboot { } { # load u-Boot into RAM and execute it pogo_init load_image uboot.kwb verify_image uboot.kwb resume 0x800200 }we make a symlink: # ( for convenience )
ln -s /usr/share/openocd/scripts/board/pogo.cfg pogo.cfg
## download uboot Pogo E02 and create Symlink: wget -c dl.dropbox.com/s/vgbshmiq3o14btp/uboot.2017.07-tld-1.pogo_e02.bodhi.tar tar -xf uboot.2017.07-tld-1.pogo_e02.bodhi.tar ln -s uboot.2017.07-tld-1.pogo_e02.mtd0.kwb uboot.kwb ## download u-boot envs and create Symlink: wget -c dl.dropbox.com/s/4smmw2wr4ugayz9/uboot.2016.05-tld-1.environment.bodhi.tar tar -xf uboot.2016.05-tld-1.environment.bodhi.tar ln -s uboot.2016.05-tld-1.environment.img uboot-env.binat last we create a new file (based on raspberrypi-native.cfg) :
sudo nano /usr/share/openocd/scripts/interface/raspberrypi123-native.cfg
and fill / change the following content:
# raspberrypi123-native.cfg (for all of the Raspis) # It´s about 4 times faster for writing and 14 times faster for reading # compared to the generic sysfsgpio driver # Config for using Raspberry Pi's expansion header # # This is best used with a fast enough buffer but also # is suitable for direct connection if the target voltage # matches RPi's 3.3V and the cable is short enough. # # Do not forget the GND connection, pin 6 of the expansion header. # # Please set the right peripheral_base address and Transition delay # depending on which Raspi (1,2 or 3) you use. interface bcm2835gpio # Raspi2 and Raspi3 peripheral_base address bcm2835gpio_peripheral_base 0x3F000000 # Raspi1 peripheral_base address # bcm2835gpio_peripheral_base 0x20000000 # Transition delay calculation: SPEED_COEFF/khz - SPEED_OFFSET # These depend on system clock, calibrated for stock 700MHz # bcm2835gpio_speed SPEED_COEFF SPEED_OFFSET # Raspi3 BCM2837 (1200Mhz): bcm2835gpio_speed_coeffs 194938 48 # Raspi2 BCM2836 (900Mhz): # bcm2835gpio_speed_coeffs 146203 36 # Raspi1 BCM2835: (700Mhz) # bcm2835gpio_speed_coeffs 113714 28 # Each of the JTAG lines need a gpio number set: tck tms tdi tdo # Header pin numbers: 23 22 19 21 bcm2835gpio_jtag_nums 11 25 10 9 # or if you have both connected, # reset_config trst_and_srst srst_push_pull # Each of the SWD lines need a gpio number set: swclk swdio # Header pin numbers: 22 18 bcm2835gpio_swd_nums 25 24 # If you define trst or srst, use appropriate reset_config # Header pin numbers: TRST - 26, SRST - 18 bcm2835gpio_trst_num 7 reset_config trst_only # bcm2835gpio_srst_num 18 # should be GPIO 24, (maybe typo in original) # reset_config srst_only srst_push_pull # or if you have both connected, # reset_config trst_and_srst srst_push_pull # adapter speed in khz # my Raspi/Pogo combo accepted 2000 khz but safely it should work with adapter_khz 200 # adapter nsrst delay in ms # if you try to flash goflexnet or iomega uncomment next line to increase delay from 200ms to 500ms # adapter_nsrst_delay 500after you´ve finished save the configuration at raspberrypi123-native.cfg than start openOCD on the Raspi:
sudo openocd -f pogo.cfgIn the next spoilers you see the commands / responses and how to use the 3 terminals.
Open On-Chip Debugger 0.10.0-dev-00247-g73b676c (2016-03-13-14:41) Licensed under GNU GPL v2 For bug reports, read http://openocd.org/doc/doxygen/bugs.html BCM2835 GPIO config: tck = 11, tms = 25, tdi = 10, tdo = 9 BCM2835 GPIO nums: swclk = 25, swdio = 24 BCM2835 GPIO config: trst = 7 trst_only separate trst_push_pull adapter speed: 2000 kHz Info : auto-selecting first available session transport "jtag". To override use 'transport select <transport>'. trst_and_srst separate srst_gates_jtag trst_push_pull srst_open_drain connect_deassert_srst adapter_nsrst_delay: 200 jtag_ntrst_delay: 200 Warn : use 'feroceon.cpu' as target identifier, not '0' pogo_load_uboot Info : BCM2835 GPIO JTAG/SWD bitbang driver Info : JTAG and SWD modes enabled Info : clock speed 2009 kHz Info : JTAG tap: feroceon.cpu tap/device found: 0x20a023d3 (mfg: 0x1e9 (Marvell Semiconductors), part: 0x0a02, ver: 0x2) Info : Embedded ICE version 0 Info : feroceon.cpu: hardware has 1 breakpoint/watchpoint unit ## open Terminal #2: # putty (WindowsPC) # $ putty <adress of your RASPI> 4444 T1 Info : accepting 'telnet' connection on tcp/4444 T2 Info : Open On-Chip Debugger > # T2 The processor will be stopped: # -> Run command: > pogo_init > soft_reset_halt # normaly it works without, if it fails, press reset button on Pogo # You normally get this event (the important thing is the status "ARM state"): # target state: halted # target halted in ARM state due to debug-request, current mode: Supervisor ## OK # cpsr: 0x000000d3 pc: 0xffff0000 # MMU: disabled, D-Cache: disabled, I-Cache: disabled # If you get the following output, again: # target state: halted # target halted in Thumb state due to debug-request, current mode: Supervisor ## not OK ! # cpsr: 0x200000f3 pc: 0xffff0a8a # MMU: enabled, D-Cache: enabled, I-Cache: enabled # T2 Is initialized with the command: > pogo_init # T2 We verify that the nand is well recognized: > nand probe 0 # NAND flash device 'NAND 128MiB 3.3V 8-bit (Hynix)' found ## OK # T2 If you see this output, start from the beginning: > nand probe 0 # unknown NAND flash device found, manufacturer id: 0x00 device id: 0x00 ## not OK! # in procedure 'nand' # T2 We clear the first 512kB: > nand erase 0 0x0 0xa0000 # erased blocks 0 to 5 on NAND flash device #0 'NAND 128MiB 3.3V 8-bit' # T2 Then we write the nand file uboot: # Files we use: pogo.cfg, and Symlinks we created before # uboot.2017.07-tld-1.pogo_e02.mtd0.kwb ----> uboot.kwb # uboot.2016.05-tld-1.environment.img ----> uboot-env.bin > nand write 0 uboot.kwb 0 oob_softecc_kw Finished -> shut down and unplug everything - than replug the Pogo to power, Pogo should start with new uboot After reboot you can see this Output in Terminal 3 (T3) with TTY/USB Adapter connected to Pogos CON3 ## start Terminal 3 with the matching ttyUSBx (mostly ttyUSB0 if nothing else is connected) ## in T3 (USB/TTL Win/Linux Terminal /dev/ttyUSBx) Hit any key to stop autoboot, U-Boot 2017.07-tld-1 (Sep 05 2017 - 00:13:18 -0700) Pogo E02 SoC: Kirkwood 88F6281_A0 DRAM: 256 MiB WARNING: Caches not enabled NAND: 128 MiB In: serial Out: serial Err: serial Net: egiga0 Hit any key to stop autoboot: 0 < Hit Enter> Pogo E02>Note:
## JTAG connector - Pogo E02 pinout ## -------------------------------------------------------------------------------- ## Pogo ## J1: (1) GND ---> next to power plug (2) TDI (3) SRST (not connected) (4) TDO # 6 connecting cables from Pogo to Raspi (must have) (5) CLK (6) TMS (7) RES (8) 3.3V (not connected) ---> next to serial port CON3: (1) GND (2) RXD # 3 connecting cables from Pogo to TTL/USB Adapter - don´t use the 3,3V! (3) TXD (4) 3.3V (not connected) -------------------------------------------------------------------------------- ## Raspi ## Note: be careful and don´t mix GPIO and Pin number on Raspi! ## we use the Pins from SPI Interface (violett) 19,21,23,26 and 22 + 20 for GND see GPIO schematic Raspi GPIO--------Pin#--color ------------ JTAG Pogo E02 (Wire colors i used from Buspirate cable-code) GND ------- 20 - (Brown) GND ----------- GND (1) GPIO 10 --- 19 - (Grey) MOSI ----------- TDI (2) GPIO 9 ---- 21 - (Black) MISO ---------- TDO (4) GPIO 11 --- 23 - (Violett) CLK --------- CLK (5) GPIO 25 --- 22 - (White) CS ------------ TMS (6) GPIO 7 --- 26 - (Blue) AUX/TRST ------- RES (7) -------------------------------------------------------------------------------- ## JTAG cable you have to build ## Create a JTAG cable with the following pinout: Pin Name Raspi(PinHeader) Pogo E02 (J1) TRST ---------- 26 ------------------- 7 GND ----------- 20 ------------------- 1 JTAG_TMS ------ 22 ------------------- 6 JTAG_TDI ------ 19 ------------------- 2 JTAG_TDO ------ 21 ------------------- 4 JTAG_TCK ------ 23 ------------------- 5good luck! - no more dead POGOS !!!
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