Re: WD MyCloud Mirror Gen2 (BWVZ, GrandTeton) November 28, 2016 02:14PM |
Registered: 10 years ago Posts: 143 |
MM
Re: WD MyCloud Mirror Gen2 (BWVZ, GrandTeton) November 29, 2016 03:46AM |
Re: WD MyCloud Mirror Gen2 (BWVZ, GrandTeton) November 29, 2016 05:59AM |
Registered: 10 years ago Posts: 143 |
MM
Re: WD MyCloud Mirror Gen2 (BWVZ, GrandTeton) November 29, 2016 07:25AM |
Re: WD MyCloud Mirror Gen2 (BWVZ, GrandTeton) November 29, 2016 03:15PM |
Registered: 10 years ago Posts: 143 |
MM
Re: WD MyCloud Mirror Gen2 (BWVZ, GrandTeton) November 29, 2016 05:04PM |
Re: WD MyCloud Mirror Gen2 (BWVZ, GrandTeton) November 30, 2016 12:53AM |
Registered: 10 years ago Posts: 143 |
MM
Re: WD MyCloud Mirror Gen2 (BWVZ, GrandTeton) December 01, 2016 07:39AM |
Re: WD MyCloud Mirror Gen2 (BWVZ, GrandTeton) December 01, 2016 02:56PM |
Registered: 10 years ago Posts: 143 |
export ARCH=arm make CROSS_COMPILE=arm-linux-gnuabihf- cp armada-385-wd.dts arch/arm/boot/dts/ make menuconfig make zImage make armada-385-wd.dtb cat arch/arm/boot/zImage arch/arm/boot/dts/armada-385-wd.dtb > zImage+dts mkimage -A arm -O linux -T kernel -C none -a 0x00008000 -e 0x00008000 -n 'WD-385' -d zImage+dts uImage
MM
Re: WD MyCloud Mirror Gen2 (BWVZ, GrandTeton) December 02, 2016 08:05AM |
boot_get_kernel : Reset button have been pushed ## Booting image at 00a00000 ... ## Booting kernel from Legacy Image at 00a00000 ... Image Name: WD-385 Created: 2016-12-02 13:58:37 UTC Image Type: ARM Linux Kernel Image (uncompressed) Data Size: 3745492 Bytes = 3.6 MiB Load Address: 00008000 Entry Point: 00008000 Verifying Checksum ... OK ## Loading init Ramdisk from Legacy Image at 00f00000 ... Image Name: Ramdisk Created: 2016-11-22 19:37:10 UTC Image Type: ARM Linux RAMDisk Image (lzma compressed) Data Size: 2565382 Bytes = 2.4 MiB Load Address: 00000000 Entry Point: 00000000 Verifying Checksum ... OK Loading Kernel Image ... OK OK Starting kernel ...
Re: WD MyCloud Mirror Gen2 (BWVZ, GrandTeton) December 02, 2016 09:09AM |
Registered: 10 years ago Posts: 143 |
MM
Re: WD MyCloud Mirror Gen2 (BWVZ, GrandTeton) December 02, 2016 10:36AM |
MM
Re: WD MyCloud Mirror Gen2 (BWVZ, GrandTeton) December 03, 2016 01:39PM |
Re: WD MyCloud Mirror Gen2 (BWVZ, GrandTeton) December 04, 2016 11:23AM |
Registered: 10 years ago Posts: 143 |
Bytes transferred = 2806891 (2ad46b hex) ## Booting image at 01200000 ... ## Booting kernel from Legacy Image at 01200000 ... Image Name: 385-WD Created: 2016-12-01 20:04:18 UTC Image Type: ARM Linux Kernel Image (uncompressed) Data Size: 3734188 Bytes = 3.6 MiB Load Address: 00008000 Entry Point: 00008000 Verifying Checksum ... OK ## Loading init Ramdisk from Legacy Image at 02000000 ... Image Name: Ramdisk Created: 2016-11-28 20:57:41 UTC Image Type: ARM Linux RAMDisk Image (lzma compressed) Data Size: 2806827 Bytes = 2.7 MiB Load Address: 00000000 Entry Point: 00000000 Verifying Checksum ... OK Loading Kernel Image ... OK OK Starting kernel ... ** 2 printk messages dropped ** [ 0.000000] CPU: ARMv7 Processor [414fc091] revision 1 (ARMv7), cr=10c5387d [ 0.000000] CPU: PIPT / VIPT nonaliasing data cache, VIPT aliasing instruction cache [ 0.000000] OF: fdt:Machine model: Marvell Armada 385 Development Board [ 0.000000] Memory policy: Data cache writealloc [ 0.000000] percpu: Embedded 13 pages/cpu @ef7cf000 s22860 r8192 d22196 u53248 [ 0.000000] Built 1 zonelists in Zone order, mobility grouping on. Total pages: 260608 [ 0.000000] Kernel command line: console=ttyS0,115200 root=LABEL=rootfs earlyprintk root=/dev/ram console=ttyS0,115200 [ 0.000000] PID hash table entries: 4096 (order: 2, 16384 bytes) [ 0.000000] Dentry cache hash table entries: 131072 (order: 7, 524288 bytes) [ 0.000000] Inode-cache hash table entries: 65536 (order: 6, 262144 bytes) [ 0.000000] Memory: 1024880K/1048576K available (8192K kernel code, 252K rwdata, 1572K rodata, 1024K init, 230K bss, 23696K reserved, 0K cma-reserved, 262144K highmem) [ 0.000000] Virtual kernel memory layout: [ 0.000000] vector : 0xffff0000 - 0xffff1000 ( 4 kB) [ 0.000000] fixmap : 0xffc00000 - 0xfff00000 (3072 kB) [ 0.000000] vmalloc : 0xf0800000 - 0xff800000 ( 240 MB) [ 0.000000] lowmem : 0xc0000000 - 0xf0000000 ( 768 MB) [ 0.000000] pkmap : 0xbfe00000 - 0xc0000000 ( 2 MB) [ 0.000000] modules : 0xbf000000 - 0xbfe00000 ( 14 MB) [ 0.000000] .text : 0xc0008000 - 0xc0900000 (9184 kB) [ 0.000000] .init : 0xc0b00000 - 0xc0c00000 (1024 kB) [ 0.000000] .data : 0xc0c00000 - 0xc0c3f300 ( 253 kB) [ 0.000000] .bss : 0xc0c3f300 - 0xc0c78bd8 ( 231 kB) [ 0.000000] Hierarchical RCU implementation. [ 0.000000] Build-time adjustment of leaf fanout to 32. [ 0.000000] RCU restricting CPUs from NR_CPUS=4 to nr_cpu_ids=2. [ 0.000000] RCU: Adjusting geometry for rcu_fanout_leaf=32, nr_cpu_ids=2 [ 0.000000] NR_IRQS:16 nr_irqs:16 16 [ 0.000000] mvebu_mbus: [Firmware Warn]: deprecated mbus-mvebu Device Tree, suspend/resume will not work [ 0.000000] L2C-310 enabling early BRESP for Cortex-A9 [ 0.000000] L2C-310 full line of zeros enabled for Cortex-A9 [ 0.000000] L2C-310 D prefetch enabled, offset 1 lines [ 0.000000] L2C-310 dynamic clock gating enabled, standby mode enabled [ 0.000000] L2C-310 Coherent cache controller enabled, 16 ways, 1024 kB [ 0.000000] L2C-310 Coherent: CACHE_ID 0x410054c9, AUX_CTRL 0x56070001 [ 0.000000] Switching to timer-based delay loop, resolution 40ns [ 0.000003] sched_clock: 32 bits at 25MHz, resolution 40ns, wraps every 85899345900ns [ 0.000011] clocksource: armada_370_xp_clocksource: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 76450417870 ns [ 0.000203] Console: colour dummy device 80x30 [ 0.000216] Calibrating delay loop (skipped), value calculated using timer frequency.. 50.00 BogoMIPS (lpj=250000) [ 0.000224] pid_max: default: 32768 minimum: 301 [ 0.000286] Mount-cache hash table entries: 2048 (order: 1, 8192 bytes) [ 0.000291] Mountpoint-cache hash table entries: 2048 (order: 1, 8192 bytes) [ 0.000569] CPU: Testing write buffer coherency: ok [ 0.000678] CPU0: thread -1, cpu 0, socket 0, mpidr 80000000 [ 0.000692] Setting up static identity map for 0x100000 - 0x100058 [ 0.000854] mvebu-soc-id: MVEBU SoC ID=0x6820, Rev=0x4 [ 0.000928] mvebu-pmsu: Initializing Power Management Service Unit [ 0.001478] Booting CPU 1 [ 0.001651] CPU1: thread -1, cpu 1, socket 0, mpidr 80000001 [ 0.001691] Brought up 2 CPUs [ 0.001697] SMP: Total of 2 processors activated (100.00 BogoMIPS). [ 0.001700] CPU: All CPU(s) started in SVC mode. [ 0.002145] devtmpfs: initialized [ 0.003913] VFP support v0.3: implementor 41 architecture 3 part 30 variant 9 rev 4 [ 0.004010] clocksource: jiffies: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 19112604462750000 ns [ 0.004037] xor: measuring software checksum speed [ 0.099815] arm4regs : 2100.800 MB/sec [ 0.199713] 8regs : 1617.200 MB/sec [ 0.299614] 32regs : 1679.600 MB/sec [ 0.399514] neon : 1530.000 MB/sec [ 0.399517] xor: using function: arm4regs (2100.800 MB/sec) [ 0.399523] pinctrl core: initialized pinctrl subsystem [ 0.399915] NET: Registered protocol family 16 [ 0.400513] DMA: preallocated 256 KiB pool for atomic coherent allocations [ 0.421248] cpuidle: using governor ladder [ 0.421311] hw-breakpoint: found 5 (+1 reserved) breakpoint and 1 watchpoint registers. [ 0.421315] hw-breakpoint: maximum watchpoint size is 4 bytes. [ 0.629502] raid6: int32x1 gen() 175 MB/s [ 0.799248] raid6: int32x1 xor() 256 MB/s [ 0.969092] raid6: int32x2 gen() 278 MB/s [ 1.138795] raid6: int32x2 xor() 283 MB/s [ 1.308731] raid6: int32x4 gen() 328 MB/s [ 1.478462] raid6: int32x4 xor() 279 MB/s [ 1.648402] raid6: int32x8 gen() 351 MB/s [ 1.818212] raid6: int32x8 xor() 258 MB/s [ 1.987960] raid6: neonx1 gen() 1010 MB/s [ 2.157781] raid6: neonx1 xor() 759 MB/s [ 2.327603] raid6: neonx2 gen() 1075 MB/s [ 2.497441] raid6: neonx2 xor() 950 MB/s [ 2.667300] raid6: neonx4 gen() 969 MB/s [ 2.837101] raid6: neonx4 xor() 858 MB/s [ 3.006911] raid6: neonx8 gen() 860 MB/s [ 3.176763] raid6: neonx8 xor() 740 MB/s [ 3.176767] raid6: using algorithm neonx2 gen() 1075 MB/s [ 3.176770] raid6: .... xor() 950 MB/s, rmw enabled [ 3.176774] raid6: using intx1 recovery algorithm [ 3.177029] vgaarb: loaded [ 3.177163] SCSI subsystem initialized [ 3.177371] usbcore: registered new interface driver usbfs [ 3.177410] usbcore: registered new interface driver hub [ 3.177442] usbcore: registered new device driver usb [ 3.178165] clocksource: Switched to clocksource armada_370_xp_clocksource [ 3.178226] VFS: Disk quotas dquot_6.6.0 [ 3.178256] VFS: Dquot-cache hash table entries: 1024 (order 0, 4096 bytes) [ 3.182482] NET: Registered protocol family 2 [ 3.182772] TCP established hash table entries: 8192 (order: 3, 32768 bytes) [ 3.182818] TCP bind hash table entries: 8192 (order: 4, 65536 bytes) [ 3.182891] TCP: Hash tables configured (established 8192 bind 8192) [ 3.182930] UDP hash table entries: 512 (order: 2, 16384 bytes) [ 3.182956] UDP-Lite hash table entries: 512 (order: 2, 16384 bytes) [ 3.183035] NET: Registered protocol family 1 [ 3.183202] RPC: Registered named UNIX socket transport module. [ 3.183207] RPC: Registered udp transport module. [ 3.183211] RPC: Registered tcp transport module. [ 3.183214] RPC: Registered tcp NFSv4.1 backchannel transport module. [ 3.183324] Trying to unpack rootfs image as initramfs... [ 4.021619] Freeing initrd memory: 2744K (c2000000 - c22ae000) [ 4.021777] hw perfevents: enabled with armv7_cortex_a9 PMU driver, 7 counters available [ 4.022369] futex hash table entries: 512 (order: 3, 32768 bytes) [ 4.022720] workingset: timestamp_bits=30 max_order=18 bucket_order=0 [ 4.022885] squashfs: version 4.0 (2009/01/31) Phillip Lougher [ 4.023107] SGI XFS with security attributes, no debug enabled [ 4.023952] async_tx: api initialized (async) [ 4.023980] bounce: pool size: 64 pages [ 4.024022] Block layer SCSI generic (bsg) driver version 0.4 loaded (major 251) [ 4.024028] io scheduler noop registered [ 4.024032] io scheduler deadline registered [ 4.024040] io scheduler cfq registered (default) [ 4.024632] armada-38x-pinctrl f1018000.pinctrl: registered pinctrl driver [ 4.025464] mvebu-pcie soc:pcie-controller: PCI host bridge to bus 0000:00 [ 4.025472] pci_bus 0000:00: root bus resource [io 0x1000-0xfffff] [ 4.025479] pci_bus 0000:00: root bus resource [mem 0xe0000000-0xe7ffffff] [ 4.025484] pci_bus 0000:00: root bus resource [bus 00-ff] [ 4.025741] PCI: bus0: Fast back to back transfers disabled [ 4.025748] pci 0000:00:01.0: bridge configuration invalid ([bus 00-00]), reconfiguring [ 4.025756] pci 0000:00:02.0: bridge configuration invalid ([bus 00-00]), reconfiguring [ 4.025818] PCI: bus1: Fast back to back transfers enabled [ 4.025884] PCI: bus2: Fast back to back transfers enabled [ 4.025907] pci 0000:00:01.0: PCI bridge to [bus 01] [ 4.025915] pci 0000:00:02.0: PCI bridge to [bus 02] [ 4.026013] mv_xor f1060800.xor: Marvell shared XOR driver [ 4.078545] mv_xor f1060800.xor: Marvell XOR (Descriptor Mode): ( xor cpy intr ) [ 4.079403] mv_xor f1060900.xor: Marvell shared XOR driver [ 4.138514] mv_xor f1060900.xor: Marvell XOR (Descriptor Mode): ( xor cpy intr ) [ 4.165496] Serial: 8250/16550 driver, 4 ports, IRQ sharing disabled [ 4.166483] console [ttyS0] disabled [ 4.186566] f1012000.serial: ttyS0 at MMIO 0xf1012000 (irq = 23, base_baud = 12500000) is a 16550A [ 4.979776] console [ttyS0] enabled [ 5.003825] f1012100.serial: ttyS1 at MMIO 0xf1012100 (irq = 24, base_baud = 12500000) is a 16550A [ 5.017650] brd: module loaded [ 5.023360] loop: module loaded [ 5.026853] ahci-mvebu f10a8000.sata: AHCI 0001.0000 32 slots 2 ports 6 Gbps 0x3 impl platform mode [ 5.035960] ahci-mvebu f10a8000.sata: flags: 64bit ncq sntf led only pmp fbs pio slum part sxs [ 5.045350] scsi host0: ahci-mvebu [ 5.048988] scsi host1: ahci-mvebu [ 5.052544] ata1: SATA max UDMA/133 mmio [mem 0xf10a8000-0xf10a9fff] port 0x100 irq 42 [ 5.060509] ata2: SATA max UDMA/133 mmio [mem 0xf10a8000-0xf10a9fff] port 0x180 irq 42 [ 5.068871] pxa3xx-nand f10d0000.flash: This platform can't do DMA on this device [ 5.076697] nand: device found, Manufacturer ID: 0xad, Chip ID: 0xda [ 5.083091] nand: Hynix H27U2G8F2CTR-BC [ 5.086943] nand: 256 MiB, SLC, erase size: 128 KiB, page size: 2048, OOB size: 64 [ 5.094552] pxa3xx-nand f10d0000.flash: ECC strength 16, ECC step size 2048 [ 5.101731] Bad block table found at page 131008, version 0x01 [ 5.107909] Bad block table found at page 130944, version 0x01 [ 5.113993] 8 ofpart partitions found on MTD device pxa3xx_nand-0 [ 5.120118] Creating 8 MTD partitions on "pxa3xx_nand-0": [ 5.125541] 0x000000000000-0x000000500000 : "U-Boot" [ 5.131046] 0x000000500000-0x000000a00000 : "uImage" [ 5.136492] 0x000000a00000-0x000000f00000 : "uRamdisk" [ 5.142117] 0x000000f00000-0x00000c800000 : "image.cfs" [ 5.148259] 0x00000c800000-0x00000d700000 : "rescue fw" [ 5.154008] 0x00000d700000-0x00000eb00000 : "config" [ 5.159534] 0x00000eb00000-0x00000f500000 : "reserve1" [ 5.165175] 0x00000f500000-0x00000ff00000 : "reserve2" [ 5.171178] libphy: Fixed MDIO Bus: probed [ 5.175461] libphy: orion_mdio_bus: probed [ 5.181389] mvneta f1034000.ethernet eth0: Using hardware mac address 00:50:43:33:36:16 [ 5.189531] usbcore: registered new interface driver rtl8150 [ 5.195245] usbcore: registered new interface driver r8152 [ 5.200792] usbcore: registered new interface driver ipheth [ 5.206388] ehci_hcd: USB 2.0 'Enhanced' Host Controller (EHCI) Driver [ 5.212946] ehci-pci: EHCI PCI platform driver [ 5.217435] ehci-orion: EHCI orion driver [ 5.221718] xhci-hcd f10f0000.usb3: xHCI Host Controller [ 5.227064] xhci-hcd f10f0000.usb3: new USB bus registered, assigned bus number 1 [ 5.234651] xhci-hcd f10f0000.usb3: hcc params 0x0a000990 hci version 0x100 quirks 0x00010010 [ 5.243239] xhci-hcd f10f0000.usb3: irq 45, io mem 0xf10f0000 [ 5.249417] hub 1-0:1.0: USB hub found [ 5.253200] hub 1-0:1.0: 1 port detected [ 5.257311] xhci-hcd f10f0000.usb3: xHCI Host Controller [ 5.262713] xhci-hcd f10f0000.usb3: new USB bus registered, assigned bus number 2 [ 5.270284] usb usb2: We don't know the algorithms for LPM for this host, disabling LPM. [ 5.278763] hub 2-0:1.0: USB hub found [ 5.282543] hub 2-0:1.0: 1 port detected [ 5.286702] xhci-hcd f10f8000.usb3: xHCI Host Controller [ 5.292062] xhci-hcd f10f8000.usb3: new USB bus registered, assigned bus number 3 [ 5.299643] xhci-hcd f10f8000.usb3: hcc params 0x0a000990 hci version 0x100 quirks 0x00010010 [ 5.308228] xhci-hcd f10f8000.usb3: irq 46, io mem 0xf10f8000 [ 5.314355] hub 3-0:1.0: USB hub found [ 5.318143] hub 3-0:1.0: 1 port detected [ 5.322264] xhci-hcd f10f8000.usb3: xHCI Host Controller [ 5.327612] xhci-hcd f10f8000.usb3: new USB bus registered, assigned bus number 4 [ 5.335182] usb usb4: We don't know the algorithms for LPM for this host, disabling LPM. [ 5.343647] hub 4-0:1.0: USB hub found [ 5.347427] hub 4-0:1.0: 1 port detected [ 5.351651] usbcore: registered new interface driver usb-storage [ 5.357831] mousedev: PS/2 mouse device common for all mice [ 5.363843] armada38x-rtc f10a3800.rtc: rtc core: registered f10a3800.rtc as rtc0 [ 5.371514] i2c /dev entries driver [ 5.386011] orion_wdt: Initial timeout 171 sec [ 5.390554] md: linear personality registered for level -1 [ 5.396063] md: raid0 personality registered for level 0 [ 5.401402] md: raid1 personality registered for level 1 [ 5.406734] md: raid10 personality registered for level 10 [ 5.412332] md: raid6 personality registered for level 6 [ 5.417665] md: raid5 personality registered for level 5 [ 5.423012] md: raid4 personality registered for level 4 [ 5.428461] device-mapper: ioctl: 4.35.0-ioctl (2016-06-23) initialised: dm-devel@redhat.com [ 5.436996] device-mapper: raid: Loading target version 1.9.1 [ 5.442932] ledtrig-cpu: registered to indicate activity on CPUs [ 5.449664] marvell-cesa f1090000.crypto: CESA device successfully registered [ 5.456989] usbcore: registered new interface driver usbhid [ 5.462601] usbhid: USB HID core driver [ 5.466493] usbcore: registered new interface driver r8712u [ 5.472244] Netfilter messages via NETLINK v0.30. [ 5.476971] nfnl_acct: registering with nfnetlink. [ 5.481861] nf_conntrack version 0.5.0 (16384 buckets, 65536 max) [ 5.488148] NET: Registered protocol family 10 [ 5.493048] sit: IPv6, IPv4 and MPLS over IPv4 tunneling driver [ 5.499342] NET: Registered protocol family 17 [ 5.503818] bridge: automatic filtering via arp/ip/ip6tables has been deprecated. Update your scripts to load br_netfilter if you need this. [ 5.516496] Bridge firewalling registered [ 5.520526] 8021q: 802.1Q VLAN Support v1.8 [ 5.524795] ThumbEE CPU extension supported. [ 5.529090] Registering SWP/SWPB emulation handler [ 5.534683] Btrfs loaded, crc32c=crc32c-generic, assert=on [ 5.540479] armada38x-rtc f10a3800.rtc: setting system clock to 2016-12-04 17:18:49 UTC (1480871929) [ 5.578180] ata2: SATA link up 3.0 Gbps (SStatus 123 SControl 300) [ 5.584404] ata1: SATA link up 3.0 Gbps (SStatus 123 SControl 300) [ 5.592119] ata1.00: ATA-8: ST9500530NS, DA03, max UDMA/133 [ 5.598064] ata1.00: 976773168 sectors, multi 0: LBA48 NCQ (depth 31/32) [ 5.607116] ata1.00: configured for UDMA/133 [ 5.611639] scsi 0:0:0:0: Direct-Access ATA ST9500530NS DA03 PQ: 0 ANSI: 5 [ 5.612164] ata2.00: ATA-8: WDC WD5001ABYS-18YNA0, 59.01D01, max UDMA/133 [ 5.612168] ata2.00: 976773168 sectors, multi 0: LBA48 NCQ (depth 31/32) [ 5.613020] ata2.00: configured for UDMA/133 [ 5.708519] sd 0:0:0:0: [sda] 976773168 512-byte logical blocks: (500 GB/466 GiB) [ 5.708554] sd 0:0:0:0: Attached scsi generic sg0 type 0 [ 5.721465] sd 0:0:0:0: [sda] Write Protect is off [ 5.721531] scsi 1:0:0:0: Direct-Access ATA WDC WD5001ABYS-1 1D01 PQ: 0 ANSI: 5 [ 5.734451] sd 0:0:0:0: [sda] Write cache: enabled, read cache: enabled, doesn't support DPO or FUA [ 5.767961] sda: sda1 [ 5.770790] sd 0:0:0:0: [sda] Attached SCSI removable disk [ 5.808460] sd 1:0:0:0: [sdb] 976773168 512-byte logical blocks: (500 GB/466 GiB) [ 5.808569] sd 1:0:0:0: Attached scsi generic sg1 type 0 [ 5.821410] sd 1:0:0:0: [sdb] Write Protect is off [ 5.826264] sd 1:0:0:0: [sdb] Write cache: enabled, read cache: enabled, doesn't support DPO or FUA [ 5.840822] sdb: sdb1 [ 5.843610] sd 1:0:0:0: [sdb] Attached SCSI removable disk [ 5.849696] Freeing unused kernel memory: 1024K (c0b00000 - c0c00000) mdadm: /dev/md/0 has been started with 2 drives. ### Press any key to stop and run shell... (2)Something went wrong. Dropping to a shell. MAC set to 00:90:A9:ED:8A:A9 udhcpc: started, v1.25.1 Setting IP address 0.0.0.0 on eth0 udhcpc: sending discover udhcpc: sending discover udhcpc: sending discover udhcpc: sending select for 192.168.0.101 udhcpc: lease of 192.168.0.101 obtained, lease time 864000 Setting IP address 192.168.0.101 on eth0 Deleting routers route: SIOCDELRT: No such process Adding router 192.168.0.100 Recreating /etc/resolv.conf Adding DNS server 192.168.0.100
MM
Re: WD MyCloud Mirror Gen2 (BWVZ, GrandTeton) December 05, 2016 10:31AM |
mm@ovid:/mnt/src$ diff -u armada-385-wd.dts.org armada-385-wd.dts --- armada-385-wd.dts.org 2016-12-05 14:56:03.192605998 +0100 +++ armada-385-wd.dts 2016-12-05 16:28:03.334899889 +0100 @@ -219,5 +219,34 @@ }; + gpio-leds { + compatible = "gpio-leds"; + pinctrl-0 = <&sata_leds>; + pinctrl-names = "default"; + + red-sata1-led { + label = "wdmcex2u:red:hdd1"; + gpios = <&gpio1 11 GPIO_ACTIVE_HIGH>; + }; + red-sata2-led { + label = "wdmcex2u:red:hdd2"; + gpios = <&gpio1 20 GPIO_ACTIVE_HIGH>; + }; + blue-sata1-led { + label = "wdmcex2u:blue:hdd1"; + gpios = <&gpio1 21 GPIO_ACTIVE_HIGH>; + }; + blue-sata2-led { + label = "wdmcex2u:blue:hdd2"; + gpios = <&gpio1 22 GPIO_ACTIVE_HIGH>; + }; + }; + }; +&pinctrl { + sata_leds: sata-leds { + marvell,pins = "mpp43", "mpp52", "mpp53", "mpp54"; + marvell,function = "gpio"; + }; +};
Re: WD MyCloud Mirror Gen2 (BWVZ, GrandTeton) December 05, 2016 01:54PM |
Registered: 10 years ago Posts: 143 |
MM
Re: WD MyCloud Mirror Gen2 (BWVZ, GrandTeton) December 07, 2016 07:19AM |
> 694.131 0xfa 0x02 0x00 0x5a 0x00 0x00 0xfb < 694.134 0xfa 0x30 0x00 0x00 0x00 0x00 0xfb > 701.099 0xfa 0x26 0x00 0x04 0x00 0x01 0xfb < 701.102 0xfa 0x30 0x00 0x00 0x00 0x00 0xfb > 701.403 0xfa 0x26 0x00 0x21 0x00 0x01 0xfb < 701.406 0xfa 0x30 0x00 0x00 0x00 0x00 0xfb > 702.138 0xfa 0x02 0x00 0x00 0x00 0x00 0xfb < 702.140 0xfa 0x30 0x00 0x00 0x00 0x00 0xfb > 704.158 0xfa 0x02 0x00 0x5a 0x00 0x00 0xfb < 704.160 0xfa 0x30 0x00 0x00 0x00 0x00 0xfb > 705.142 0xfa 0x03 0x03 0x02 0x01 0x0a 0xfb < 705.145 0xfa 0x30 0x00 0x00 0x00 0x00 0xfb
> 915.070 0xfa 0x02 0x00 0x5a 0x00 0x00 0xfb < 915.072 0xfa 0x30 0x00 0x00 0x00 0x00 0xfb > 925.096 0xfa 0x02 0x00 0x5a 0x00 0x00 0xfb < 925.098 0xfa 0x30 0x00 0x00 0x00 0x00 0xfb > 935.121 0xfa 0x03 0x08 0x00 0x00 0x00 0xfb < 935.124 0xfa 0x03 0x08 0x00 0x00 0x6f 0xfb < 935.128 0xfa 0x30 0x00 0x00 0x00 0x00 0xfb > 936.127 0xfa 0x02 0x00 0x5a 0x00 0x00 0xfb < 936.130 0xfa 0x30 0x00 0x00 0x00 0x00 0xfb > 938.314 0xfa 0x26 0x00 0x01 0x00 0x01 0xfb < 938.316 0xfa 0x30 0x00 0x00 0x00 0x00 0xfb > 938.618 0xfa 0x26 0x00 0x04 0x00 0x01 0xfb < 938.620 0xfa 0x30 0x00 0x00 0x00 0x00 0xfb > 938.922 0xfa 0x26 0x00 0x04 0x00 0x01 0xfb < 938.925 0xfa 0x30 0x00 0x00 0x00 0x00 0xfb > 939.227 0xfa 0x26 0x00 0x01 0x00 0x01 0xfb < 939.229 0xfa 0x30 0x00 0x00 0x00 0x00 0xfb > 939.531 0xfa 0x03 0x03 0x01 0x01 0x01 0xfb < 939.533 0xfa 0x30 0x00 0x00 0x00 0x00 0xfb
Re: WD MyCloud Mirror Gen2 (BWVZ, GrandTeton) December 07, 2016 01:29PM |
Registered: 10 years ago Posts: 143 |
I know, thats why it should be killed as the last process. Somehow there might be a delay in the code, but this delay is not working :-/Quote
I also observed, that when executing "service mcm-daemon stop" in Debian, the device immediatelly shuts off.
MM
Re: WD MyCloud Mirror Gen2 (BWVZ, GrandTeton) December 08, 2016 07:42AM |
echo -e "\xfa\x26\x00\x01\x00\x01\xfb" > /dev/ttyS1 echo -e "\xfa\x26\x00\x04\x00\x01\xfb" > /dev/ttyS1 echo -e "\xfa\x26\x00\x04\x00\x01\xfb" > /dev/ttyS1 echo -e "\xfa\x26\x00\x01\x00\x01\xfb" > /dev/ttyS1 echo -e "\xfa\x03\x03\x01\x01\x01\xfb" > /dev/ttyS1
execve("./usrsbin/set_wol", ["./usrsbin/set_wol"], [/* 8 vars */]) = 0 brk(0) = 0x28000 uname({sys="Linux", node="MyCloudEX2Uegiga0: ltra", ...}) = 0link down access("/etc/ld.so.preload", R_OK) = -1 ENOENT (No such file or directoryegiga0: ) open("/etc/ldlink up.so.cache", O_RD, full duplexONLY|O_CLOEXEC) , speed = 3 fstat64(3, 1 Gbps {st_mode=S_IFREG|0644, st_size=15905, ...}) = 0 mmap2(NULL, 15905, PROT_READ, MAP_PRIVATE, 3, 0) = 0xb6870000 close(3) = 0 open("/lib/libshare.so", O_RDONLY|O_CLOEXEC) = 3 read(3, "\177ELF\1\1\1\0\0\0\0\0\0\0\0\0\3\0(\0\1\0\0\0 \"\0\0004\0\0\0"..., 512) = 512 fstat64(3, {st_mode=S_IFREG|0755, st_size=43967, ...}) = 0 mmap2(NULL, 107988, PROT_READ|PROT_EXEC, MAP_PRIVATE|MAP_DENYWRITE, 3, 0) = 0xb6850000 mprotect(0xb6860000, 32768, PROT_NONE) = 0 mmap2(0xb6868000, 32768, PROT_READ|PROT_WRITE, MAP_PRIVATE|MAP_FIXED|MAP_DENYWRITE, 3, 0x40000) = 0xb6868000 close(3) = 0 open("/lib/libxmldbc.so", O_RDONLY|O_CLOEXEC) = 3 read(3, "\177ELF\1\1\1\0\0\0\0\0\0\0\0\0\3\0(\0\1\0\0\0$\17\0\0004\0\0\0"..., 512) = 512 fstat64(3, {st_mode=S_IFREG|0755, st_size=11928, ...}) = 0 mmap2(NULL, 76052, PROT_READ|PROT_EXEC, MAP_PRIVATE|MAP_DENYWRITE, 3, 0) = 0xb6838000 mprotect(0xb6840000, 32768, PROT_NONE) = 0 mmap2(0xb6848000, 32768, PROT_READ|PROT_WRITE, MAP_PRIVATE|MAP_FIXED|MAP_DENYWRITE, 3, 0) = 0xb6848000 close(3) = 0 open("/lib/libgcc_s.so.1", O_RDONLY|O_CLOEXEC) = 3 read(3, "\177ELF\1\1\1\0\0\0\0\0\0\0\0\0\3\0(\0\1\0\0\0H&\0\0004\0\0\0"..., 512) = 512 fstat64(3, {st_mode=S_IFREG|0644, st_size=40716, ...}) = 0 mmap2(NULL, 104980, PROT_READ|PROT_EXEC, MAP_PRIVATE|MAP_DENYWRITE, 3, 0) = 0xb6818000 mprotect(0xb6828000, 32768, PROT_NONE) = 0 mmap2(0xb6830000, 32768, PROT_READ|PROT_WRITE, MAP_PRIVATE|MAP_FIXED|MAP_DENYWRITE, 3, 0x40000) = 0xb6830000 close(3) = 0 open("/lib/libc.so.6", O_RDONLY|O_CLOEXEC) = 3 read(3, "\177ELF\1\1\1\0\0\0\0\0\0\0\0\0\3\0(\0\1\0\0\0\350|\1\0004\0\0\0"..., 512) = 512 fstat64(3, {st_mode=S_IFREG|0755, st_size=1221784, ...}) = 0 mmap2(NULL, 1295744, PROT_READ|PROT_EXEC, MAP_PRIVATE|MAP_DENYWRITE, 3, 0) = 0xb66d8000 mprotect(0xb6800000, 32768, PROT_NONE) = 0 mmap2(0xb6808000, 65536, PROT_READ|PROT_WRITE, MAP_PRIVATE|MAP_FIXED|MAP_DENYWRITE, 3, 0x900000) = 0xb6808000 close(3) = 0 set_tls(0xb68aa880, 0xb68aaf58, 0xb68a8050, 0xb68aa880, 0xb68a8050) = 0 mprotect(0xb6808000, 32768, PROT_READ) = 0 mprotect(0xb68a0000, 32768, PROT_READ) = 0 munmap(0xb6870000, 15905) = 0 socket(PF_LOCAL, SOCK_STREAM, 0) = 3 fcntl64(3, F_SETFD, FD_CLOEXEC) = 0 connect(3, {sa_family=AF_LOCAL, sun_path="/var/run/xmldb_sock"}, 110) = 0 send(3, "\1\0\34\0\0\0\0\0\0\0\1\0\340w", 14, MSG_NOSIGNAL) = 14 send(3, "/network_mgr/bonding/enable\0", 28, MSG_NOSIGNAL) = 28 select(4, [3], NULL, NULL, NULL) = 1 (in [3]) read(3, "0\0", 1024) = 2 close(3) = 0 brk(0) = 0x28000 brk(0x50000) = 0x50000 open("/tmp/mac_addr", O_RDONLY|O_LARGEFILE) = 3 fstat64(3, {st_mode=S_IFREG|0644, st_size=18, ...}) = 0 mmap2(NULL, 32768, PROT_READ|PROT_WRITE, MAP_PRIVATE|MAP_ANONYMOUS, -1, 0) = 0xb6870000 read(3, "00:90:A9:EA:45:B2\n", 32768) = 18 close(3) = 0 munmap(0xb6870000, 32768) = 0 socket(PF_INET, SOCK_DGRAM, IPPROTO_IP) = 3 ioctl(3, SIOCDEVPRIVATE, 0xbeb77c60) = 0 close(3) = 0 nanosleep({0, 1000000}, NULL) = 0 socket(PF_INET, SOCK_DGRAM, IPPROTO_IP) = 3 ioctl(3, SIOCDEVPRIVATE, 0xbeb77c60) = 0 close(3) = 0 socket(PF_INET, SOCK_DGRAM, IPPROTO_IP) = 3 ioctl(3, SIOCDEVPRIVATE, 0xbeb77c60) = 0 close(3) = 0 socket(PF_INET, SOCK_DGRAM, IPPROTO_IP) = 3 ioctl(3, SIOCDEVPRIVATE, 0xbeb77c60) = 0 close(3) = 0 nanosleep({0, 10000000}, NULL) = 0 socket(PF_INET, SOCK_DGRAM, IPPROTO_IP) = 3 ioctl(3, SIOCDEVPRIVATE, 0xbeb77c60) = 0 close(3) = 0 socket(PF_INET, SOCK_DGRAM, IPPROTO_IP) = 3 ioctl(3, SIOCDEVPRIVATE, 0xbeb77c60) = 0 close(3) = 0 socket(PF_INET, SOCK_DGRAM, IPPROTO_IP) = 3 ioctl(3, SIOCDEVPRIVATE, 0xbeb77c60) = 0 close(3) = 0 socket(PF_INET, SOCK_DGRAM, IPPROTO_IP) = 3 ioctl(3, SIOCDEVPRIVATE, 0xbeb77c60) = 0 close(3) = 0 socket(PF_INET, SOCK_DGRAM, IPPROTO_IP) = 3 ioctl(3, SIOCDEVPRIVATE, 0xbeb77c60) = 0 close(3) = 0 socket(PF_INET, SOCK_DGRAM, IPPROTO_IP) = 3 ioctl(3, SIOCDEVPRIVATE, 0xbeb77c60) = 0 close(3) = 0 socket(PF_INET, SOCK_DGRAM, IPPROTO_IP) = 3 ioctl(3, SIOCDEVPRIVATE, 0xbeb77c60) = 0 close(3) = 0 socket(PF_INET, SOCK_DGRAM, IPPROTO_IP) = 3 ioctl(3, SIOCDEVPRIVATE, 0xbeb77c60) = 0 close(3) = 0 socket(PF_INET, SOCK_DGRAM, IPPROTO_IP) = 3 ioctl(3, SIOCDEVPRIVATE, 0xbeb77c60) = 0 close(3) = 0 socket(PF_INET, SOCK_DGRAM, IPPROTO_IP) = 3 ioctl(3, SIOCDEVPRIVATE, 0xbeb77c60) = 0 close(3) = 0 socket(PF_INET, SOCK_DGRAM, IPPROTO_IP) = 3 ioctl(3, SIOCDEVPRIVATE, 0xbeb77c60) = 0 close(3) = 0 socket(PF_INET, SOCK_DGRAM, IPPROTO_IP) = 3 ioctl(3, SIOCDEVPRIVATE, 0xbeb77c60) = 0 close(3) = 0 exit_group(0) = ? +++ exited with 0 +++Unfortunately I can make no sense out of it. It connects to the xmldb where it probably just changes the network status and does a series of private ioctl. I have no idea on how to find out what they are doing.
egiga0: link down egiga0: link up, full duplex, speed 1 GbpsI can then echo the above sequence to the micro, the device shuts down and I can wake it up with etherwake.
echo -e "\xfa\x03\x03\x02\x01\x0a\xfb" > /dev/ttyS1
Re: WD MyCloud Mirror Gen2 (BWVZ, GrandTeton) December 08, 2016 03:34PM |
Registered: 10 years ago Posts: 143 |
Quote
MM
I guess the direction to continue is to make the device shutdown or reboot reliable in debian and forget about the wol stuff for now.
MM
Re: WD MyCloud Mirror Gen2 (BWVZ, GrandTeton) December 09, 2016 06:23AM |
MM
Re: WD MyCloud Mirror Gen2 (BWVZ, GrandTeton) December 12, 2016 12:54PM |
Re: WD MyCloud Mirror Gen2 (BWVZ, GrandTeton) December 12, 2016 01:53PM |
Registered: 10 years ago Posts: 143 |
Quote
MM
* What can be done in userspace should be done in userspace.
* We have a working driver which already claims the device and controls it correctly (aka serial_io).
* serial access from within the kernel over the existing driver is possible but cumbersome as one would need to synchronize kernel access to the device with possible userspace access to the device.
Quote
MM
Did you find out something new regarding systemd and the possibility to execute commands that trigger shutdown/reboot or do you have strong reasons, why the hassle to claim the device from the existing driver would be worth it?
MM
Re: WD MyCloud Mirror Gen2 (BWVZ, GrandTeton) December 12, 2016 05:58PM |
Quote
Peacemaker
-------------------------------------------------------
> So my hope with kernel-module was: we do not need
> to frickle arround with all of this as the kernel
> do the reboot, halt, that the rtc and so on,...
Re: WD MyCloud Mirror Gen2 (BWVZ, GrandTeton) December 13, 2016 01:50AM |
Registered: 10 years ago Posts: 143 |
MM
Re: WD MyCloud Mirror Gen2 (BWVZ, GrandTeton) December 14, 2016 11:00AM |
tftp 0x00a00000 uImage ; tftp 0x00f00000 uRamdisk.jessie-sd; bootm 0x00a00000 0x00f00000
Re: WD MyCloud Mirror Gen2 (BWVZ, GrandTeton) December 17, 2016 06:02AM |
Registered: 10 years ago Posts: 143 |
> tftp 0x00a00000 uImage ; tftp 0x00f00000 > uRamdisk.jessie-sd; bootm 0x00a00000 0x00f00000 >>
MM
Re: WD MyCloud Mirror Gen2 (BWVZ, GrandTeton) December 17, 2016 08:35AM |
Re: WD MyCloud Mirror Gen2 (BWVZ, GrandTeton) December 17, 2016 09:27AM |
Registered: 10 years ago Posts: 143 |
MM
Re: WD MyCloud Mirror Gen2 (BWVZ, GrandTeton) December 17, 2016 10:46AM |
diff -r -u -N linux-4.8.12.org/drivers/power/reset/Kconfig linux-4.8.12/drivers/power/reset/Kconfig --- linux-4.8.12.org/drivers/power/reset/Kconfig 2016-12-02 09:11:45.000000000 +0100 +++ linux-4.8.12/drivers/power/reset/Kconfig 2016-12-16 19:37:39.787988518 +0100 @@ -120,6 +120,15 @@ Say Y if you have a QNAP NAS. +config POWER_RESET_WDEX2U + bool "WDMC EX2 ultra power-off driver" + depends on OF_GPIO && PLAT_ORION + help + This driver supports turning off WD MyCloud EX2 ultra NAS devices by + sending commands to the microcontroller which controls the main power. + + Say Y if you have a WD MyCloud EX2 ultra + config POWER_RESET_RESTART bool "Restart power-off driver" help diff -r -u -N linux-4.8.12.org/drivers/power/reset/Makefile linux-4.8.12/drivers/power/reset/Makefile --- linux-4.8.12.org/drivers/power/reset/Makefile 2016-12-02 09:11:45.000000000 +0100 +++ linux-4.8.12/drivers/power/reset/Makefile 2016-12-16 19:38:06.395973742 +0100 @@ -12,6 +12,7 @@ obj-$(CONFIG_POWER_RESET_MSM) += msm-poweroff.o obj-$(CONFIG_POWER_RESET_LTC2952) += ltc2952-poweroff.o obj-$(CONFIG_POWER_RESET_QNAP) += qnap-poweroff.o +obj-$(CONFIG_POWER_RESET_WDEX2U) += wt-poweroff.o obj-$(CONFIG_POWER_RESET_RESTART) += restart-poweroff.o obj-$(CONFIG_POWER_RESET_ST) += st-poweroff.o obj-$(CONFIG_POWER_RESET_VERSATILE) += arm-versatile-reboot.o diff -r -u -N linux-4.8.12.org/drivers/power/reset/wt-poweroff.c linux-4.8.12/drivers/power/reset/wt-poweroff.c --- linux-4.8.12.org/drivers/power/reset/wt-poweroff.c 1970-01-01 01:00:00.000000000 +0100 +++ linux-4.8.12/drivers/power/reset/wt-poweroff.c 2016-12-17 17:21:42.423378737 +0100 @@ -0,0 +1,184 @@ +/* + * Poweroff and restart driver for the Western Digital + * MyCloud EX2 Ultra NAS. It could be easily reused for + * other devices with a serial connected MCU. + * + * Copyright (C) 2016 Martin Mueller <wdmc@sig21.net> + * + * Based on the code from: + * + * Copyright (C) 2012 Andrew Lunn <andrew@lunn.ch> + * Copyright (C) 2009 Martin Michlmayr <tbm@cyrius.com> + * Copyright (C) 2008 Byron Bradley <byron.bbradley@gmail.com> + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * as published by the Free Software Foundation; either version + * 2 of the License, or (at your option) any later version. + */ + +#include <linux/kernel.h> +#include <linux/module.h> +#include <linux/platform_device.h> +#include <linux/serial_reg.h> +#include <linux/kallsyms.h> +#include <linux/of.h> +#include <linux/io.h> +#include <linux/clk.h> +#include <linux/delay.h> +#include <asm/system_misc.h> + +#define UART_REG(x) (base + ((UART_##x) << 2)) + +struct power_mcu_cmds { + u32 baud; + char *poweroff; + char *restart; +}; + +static const struct power_mcu_cmds wdmcex2u_power_mcu_cmds = { + .baud = 19200, + .poweroff = "\xfa\x03\x03\x01\x01\x01\xfb", + .restart = "\xfa\x03\x03\x02\x01\x0a\xfb", +}; + +static const struct of_device_id wt_power_off_of_match_table[] = { + { .compatible = "wdmcex2u,power-off", + .data = &wdmcex2u_power_mcu_cmds, + }, + {} +}; +MODULE_DEVICE_TABLE(of, wt_power_off_of_match_table); + +static void __iomem *base; +static unsigned long tclk; +static const struct power_mcu_cmds *cfg; + +static void *pm_power_off_org; +static void *arm_pm_restart_org; + +static void wt_power_off(void) +{ + const unsigned divisor = ((tclk + (8 * cfg->baud)) / (16 * cfg->baud)); + uint8_t i; + + pr_err("%s: triggering power-off...\n", __func__); + + /* hijack UART and reset into sane state */ + writel(0x83, UART_REG(LCR)); + writel(divisor & 0xff, UART_REG(DLL)); + writel((divisor >> 8) & 0xff, UART_REG(DLM)); + writel(0x03, UART_REG(LCR)); + writel(0x00, UART_REG(IER)); + writel(0x00, UART_REG(FCR)); + writel(0x00, UART_REG(MCR)); + + /* send the power-off command to PIC */ + for (i=0; i<strlen(cfg->poweroff); i++) { + writel(cfg->poweroff, UART_REG(TX)); + mdelay(2); + } + mdelay(1000); + pr_err("%s: triggering power-off failed!\n", __func__); +} + +static void wt_restart(enum reboot_mode reboot_mode, const char *cmd) +{ + const unsigned divisor = ((tclk + (8 * cfg->baud)) / (16 * cfg->baud)); + uint8_t i; + + pr_err("%s: triggering restart...\n", __func__); + + /* hijack UART and reset into sane state */ + writel(0x83, UART_REG(LCR)); + writel(divisor & 0xff, UART_REG(DLL)); + writel((divisor >> 8) & 0xff, UART_REG(DLM)); + writel(0x03, UART_REG(LCR)); + writel(0x00, UART_REG(IER)); + writel(0x00, UART_REG(FCR)); + writel(0x00, UART_REG(MCR)); + + /* send the restart command to PIC */ + for (i=0; i<strlen(cfg->restart); i++) { + writel(cfg->restart, UART_REG(TX)); + mdelay(2); + } + mdelay(1000); + pr_err("%s: triggering restart failed!\n", __func__); +} + +static int wt_power_off_probe(struct platform_device *pdev) +{ + struct device_node *np = pdev->dev.of_node; + struct resource *res; + struct clk *clk; + char symname[KSYM_NAME_LEN]; + + const struct of_device_id *match = + of_match_node(wt_power_off_of_match_table, np); + cfg = match->data; + + res = platform_get_resource(pdev, IORESOURCE_MEM, 0); + if (!res) { + dev_err(&pdev->dev, "Missing resource"); + return -EINVAL; + } + + base = devm_ioremap(&pdev->dev, res->start, resource_size(res)); + if (!base) { + dev_err(&pdev->dev, "Unable to map resource"); + return -EINVAL; + } + + /* We need to know tclk in order to calculate the UART divisor */ + clk = devm_clk_get(&pdev->dev, NULL); + if (IS_ERR(clk)) { + dev_err(&pdev->dev, "Clk missing"); + return PTR_ERR(clk); + } + + tclk = clk_get_rate(clk); + + pm_power_off_org = pm_power_off; + if ( strlen(cfg->poweroff) ) { + if (pm_power_off) { + lookup_symbol_name((ulong)pm_power_off, symname); + dev_warn(&pdev->dev, "replacing pm_power_off (%s)", symname); + } else + dev_notice(&pdev->dev, "installing pm_power_off handler"); + pm_power_off = wt_power_off; + } + + arm_pm_restart_org = arm_pm_restart; + if ( strlen(cfg->restart) ) { + if (arm_pm_restart) { + lookup_symbol_name((ulong)arm_pm_restart, symname); + dev_warn(&pdev->dev, "replacing arm_pm_restart (%s)", symname); + } else + dev_notice(&pdev->dev, "installing arm_pm_restart handler"); + arm_pm_restart = wt_restart; + } + + return 0; +} + +static int wt_power_off_remove(struct platform_device *pdev) +{ + pm_power_off = pm_power_off_org; + arm_pm_restart = arm_pm_restart_org; + return 0; +} + +static struct platform_driver wt_power_off_driver = { + .probe = wt_power_off_probe, + .remove = wt_power_off_remove, + .driver = { + .name = "wt_power_off", + .of_match_table = of_match_ptr(wt_power_off_of_match_table), + }, +}; +module_platform_driver(wt_power_off_driver); + +MODULE_AUTHOR("Martin Mueller <wdmc@sig21.net>"); +MODULE_DESCRIPTION("Welltrend MCU power off driver"); +MODULE_LICENSE("GPL v2"); --- linux-4.8.12.org/.config 2016-12-16 18:13:15.719627882 +0100 +++ linux-4.8.12/.config 2016-12-17 17:21:52.707374317 +0100 @@ -105,8 +105,8 @@ # CONFIG_RCU_EXPEDITE_BOOT is not set # CONFIG_BUILD_BIN2C is not set # CONFIG_IKCONFIG is not set -CONFIG_LOG_BUF_SHIFT=14 -CONFIG_LOG_CPU_MAX_BUF_SHIFT=12 +CONFIG_LOG_BUF_SHIFT=17 +CONFIG_LOG_CPU_MAX_BUF_SHIFT=14 CONFIG_NMI_LOG_BUF_SHIFT=13 CONFIG_GENERIC_SCHED_CLOCK=y CONFIG_CGROUPS=y @@ -2447,10 +2447,11 @@ CONFIG_POWER_RESET=y # CONFIG_POWER_RESET_BRCMKONA is not set # CONFIG_POWER_RESET_BRCMSTB is not set -CONFIG_POWER_RESET_GPIO=y -CONFIG_POWER_RESET_GPIO_RESTART=y +# CONFIG_POWER_RESET_GPIO is not set +# CONFIG_POWER_RESET_GPIO_RESTART is not set # CONFIG_POWER_RESET_LTC2952 is not set # CONFIG_POWER_RESET_QNAP is not set +CONFIG_POWER_RESET_WDEX2U=y # CONFIG_POWER_RESET_RESTART is not set # CONFIG_POWER_RESET_VERSATILE is not set # CONFIG_POWER_RESET_SYSCON is not set --- linux-4.8.12.org/arch/arm/boot/dts/armada-385-wd.dts 2016-12-14 17:48:42.099921892 +0100 +++ linux-4.8.12/arch/arm/boot/dts/armada-385-wd.dts 2016-12-17 17:21:52.447374429 +0100 @@ -17,7 +17,7 @@ #include <dt-bindings/gpio/gpio.h> / { - model = "Marvell Armada 385 Development Board"; + model = "Western Digital MyCloud EX2 Ultra"; compatible = "marvell,a385-db", "marvell,armada385", "marvell,armada38x"; chosen { @@ -103,14 +103,23 @@ no-1-8-v; }; - serial@12100 { + serial@12000 { status = "okay"; }; - - serial@12000 { + + /* ttyS1 is connected to w Welltrend 6703F-OG240WT Micocontroller + * which controls power fan and other things */ + serial@12100 { status = "okay"; }; + poweroff@12100 { + compatible = "wdmcex2u,power-off"; + reg = <0x12100 0x100>; + clocks = <&coreclk 0>; + status = "okay"; + }; + spi0: spi@10600 { status = "okay";