Re: HOW2: Repair Pogo E02 with Raspberry PI (1,2 or 3) JTAG and OpenOCD October 15, 2018 03:59PM |
Registered: 6 years ago Posts: 23 |
> nand write 0 uboot-env.img 0xc0000 oob_softecc_kw wrote file uboot-env.img to NAND flash 0 up to offset 0x000e0000 in 51.873577s (2.468 KiB/s)
nand write 0 uboot-env.img 0xa0000 oob_softecc_kw
Re: HOW2: Repair Pogo E02 with Raspberry PI (1,2 or 3) JTAG and OpenOCD October 15, 2018 04:17PM |
Registered: 6 years ago Posts: 23 |
U-Boot 2016.11+dfsg1-4 (Mar 27 2017 - 18:39:51 +0000)
Seagate FreeAgent DockStar
SoC: Kirkwood 88F6281_A0
DRAM: 128 MiB
WARNING: Caches not enabled
NAND: 256 MiB
In: serial
Out: serial
Err: serial
Net: egiga0
88E1116 Initialized on egiga0
Hit any key to stop autoboot: 3 \0x08\0x08\0x08 0
DockStar> printenv
baudrate=115200
bootargs_root=ubi.mtd=1 root=ubi0:root rootfstype=ubifs ro
bootcmd=setenv bootargs ${console} ${mtdparts} ${bootargs_root}; ubi part root; ubifsmount ubi:root; ubifsload 0x800000 ${kernel}; ubifsload 0x1100000 ${initrd}; bootm 0x800000 0x1100000
bootdelay=3
console=console=ttyS0,115200
ethact=egiga0
ethaddr=00:10:75:xx:xx:xx
initrd=/boot/uInitrd
ipaddr=192.168.x.x
kernel=/boot/uImage
mtdids=nand0=orion_nand
mtdparts=mtdparts=orion_nand:1m(uboot),-(root)
stderr=serial
stdin=serial
stdout=serial
Environment size: 548/131068 bytes
DockStar>
Re: HOW2: Repair Pogo E02 with Raspberry PI (1,2 or 3) JTAG and OpenOCD October 15, 2018 08:13PM |
Admin Registered: 13 years ago Posts: 19,102 |
nand write 0 uboot-env.img 0xa0000 oob_softecc_kwLet me take a quick look at the mainline source code (your u-boot is straight from mainline). My version of u-boot do not use 0xa0000. The mainline one probably don't use that either.
Re: HOW2: Repair Pogo E02 with Raspberry PI (1,2 or 3) JTAG and OpenOCD October 15, 2018 08:27PM |
Admin Registered: 13 years ago Posts: 19,102 |
U-Boot 2016.11+dfsg1-4 (Mar 27 2017 - 18:39:51 +0000) Seagate FreeAgent DockStar SoC: Kirkwood 88F6281_A0 DRAM: 128 MiB WARNING: Caches not enabled NAND: 256 MiB In: serial Out: serial Err: serial Net: egiga0 88E1116 Initialized on egiga0 Hit any key to stop autoboot: 3 \0x08\0x08\0x08 0 DockStar> printenv baudrate=115200 bootargs_root=ubi.mtd=1 root=ubi0:root rootfstype=ubifs ro bootcmd=setenv bootargs ${console} ${mtdparts} ${bootargs_root}; ubi part root; ubifsmount ubi:root; ubifsload 0x800000 ${kernel}; ubifsload 0x1100000 ${initrd}; bootm 0x800000 0x1100000 bootdelay=3 console=console=ttyS0,115200 ethact=egiga0 ethaddr=00:10:75:xx:xx:xx initrd=/boot/uInitrd ipaddr=192.168.x.x kernel=/boot/uImage mtdids=nand0=orion_nand mtdparts=mtdparts=orion_nand:1m(uboot),-(root) stderr=serial stdin=serial stdout=serial Environment size: 548/131068 bytes DockStar>
Martin from Dortmund
Re: HOW2: Repair Pogo E02 with Raspberry PI (1,2 or 3) JTAG and OpenOCD October 16, 2018 03:32AM |
Re: HOW2: Repair Pogo E02 with Raspberry PI (1,2 or 3) JTAG and OpenOCD October 16, 2018 04:12AM |
Admin Registered: 13 years ago Posts: 19,102 |
Quote
C. Add uEnv.txt to /boot directory (Optional)
To adjust the default envs to your specific configuration, and not having to permanently alter u-boot envs NAND. Create a text file in /boot directory with the content in the format that u-boot envs are listed.
Examples:
The example below only to demonstrate the syntax in uEnv.txt (they might or might not apply to your current settings):
- Load appropriate DTB file for the kernel to run GoFlex Net box.
- Use SD card, USB and SATA for booting. The kernel and rootfs search order is as they are appeared on the list: mmc, usb, ide.
- Define that there are 8 storage devices (i.e. disk partitions).
cat /boot/uEnv.txt
dtb_file=/boot/dts/kirkwood-goflexnet.dtb
devices=mmc usb ide
disks=0 1 2 3 4 5 6 7
bootcmd=setenv bootargs ${console} ${mtdparts} ${bootargs_root}; ubi part root; ubifsmount ubi:root; ubifsload 0x800000 ${kernel}; ubifsload 0x1100000 ${initrd}; bootm 0x800000 0x1100000
setenv bootcmd 'setenv bootargs ${console} ${mtdparts} ${bootargs_root}; ubi part root; ubifsmount ubi:root; ubifsload 0x800000 ${kernel}; ubifsload 0x1100000 ${initrd}; bootm 0x800000 0x1100000'
Martin from Dortmund
Re: HOW2: Repair Pogo E02 with Raspberry PI (1,2 or 3) JTAG and OpenOCD October 16, 2018 04:40AM |
Re: HOW2: Repair Pogo E02 with Raspberry PI (1,2 or 3) JTAG and OpenOCD October 16, 2018 04:58AM |
Admin Registered: 13 years ago Posts: 19,102 |
Martin from Dortmund
Re: HOW2: Repair Pogo E02 with Raspberry PI (1,2 or 3) JTAG and OpenOCD October 16, 2018 05:37AM |
Quote
bodhi
... usually it is much better to put it in a storage drive or the NAND rootfs partition.
Re: HOW2: Repair Pogo E02 with Raspberry PI (1,2 or 3) JTAG and OpenOCD October 16, 2018 07:16AM |
Admin Registered: 13 years ago Posts: 19,102 |
>Quote
bodhi
> ... usually it is much better to put it in a
> storage drive or the NAND rootfs partition.
>
uboot-env.imgor
uboot.2016.05-tld-1.environment.img
Martin from Dortmund
Re: HOW2: Repair Pogo E02 with Raspberry PI (1,2 or 3) JTAG and OpenOCD October 16, 2018 09:14AM |
Re: HOW2: Repair Pogo E02 with Raspberry PI (1,2 or 3) JTAG and OpenOCD October 16, 2018 01:07PM |
Registered: 6 years ago Posts: 23 |
> nand write 0 uboot-env.img 0x80000 oob_softecc_kw wrote file uboot-env.img to NAND flash 0 up to offset 0x000a0000 in 48.620975s (2.633 KiB/s) >
-Boot 2016.11+dfsg1-4 (Mar 27 2017 - 18:39:51 +0000) Seagate FreeAgent DockStar SoC: Kirkwood 88F6281_A0 DRAM: 128 MiB WARNING: Caches not enabled NAND: 256 MiB NAND read from offset 80000 failed -74 *** Warning - readenv() failed, using default environment In: serial Out: serial Err: serial Net: egiga0 Error: egiga0 address not set. 88E1116 Initialized on egiga0 Hit any key to stop autoboot: 3 \0x08\0x08\0x08 0 DockStar>
Re: HOW2: Repair Pogo E02 with Raspberry PI (1,2 or 3) JTAG and OpenOCD October 16, 2018 03:46PM |
Registered: 6 years ago Posts: 23 |
U-Boot 2017.07-tld-1 (Oct 24 2017 - 22:32:36 -0700) Seagate FreeAgent DockStar SoC: Kirkwood 88F6281_A0 DRAM: 128 MiB WARNING: Caches not enabled NAND: 256 MiB NAND read from offset c0000 failed -74 *** Warning - readenv() failed, using default environment
setenv arcNumber 2998 setenv bootcmd_exec 'run load_uimage\;if run load_initrd\;then if run load_dtb\;then bootm $load_uimage_addr $load_initrd_addr $load_dtb_addr\;else bootm $load_uimage_addr $load_initrd_addr\; fi\; else if run load_dtb\; then bootm $load_uimage_addr - $load_dtb_addr\; else bootm $load_uimage_addr\; fi\; fi' setenv bootcmd 'run bootcmd_uenv\; run scan_disk\; run set_bootargs\; run bootcmd_exec' setenv bootcmd_uenv 'run uenv_load\; if test $uenv_loaded -eq 1\; then run uenv_import\; fi' setenv bootdelay 10 setenv bootdev usb setenv device 0:1 setenv devices 'usb ide mmc' setenv disks '0 1 2 3' setenv ethact egiga0 setenv ethaddr '00:10:75:rr:ee:tt' setenv if_netconsole 'ping $serverip' setenv ipaddr 192.168.yy.zz setenv led_error 'orange blinking' setenv led_exit 'green off' setenv led_init 'green blinking' setenv dtb_file '/boot/dts/kirkwood-pogo_e02.dtb' setenv load_dtb_addr '0x1c00000' setenv load_initrd_addr '0x1100000' setenv load_uimage_addr '0x800000' setenv load_dtb 'echo loading DTB $dtb_file ...\; load $bootdev $device $load_dtb_addr $dtb_file' setenv load_initrd 'echo loading uInitrd ...\; load $bootdev $device $load_initrd_addr /boot/uInitrd' setenv load_uimage 'echo loading uImage ...\; load $bootdev $device $load_uimage_addr /boot/uImage' setenv machid setenv mainlineLinux yes setenv mtdids 'nand0=orion_nand' setenv mtdparts 'mtdparts=orion_nand:1M(u-boot),4M(uImage),32M(rootfs),-(data)' setenv partition 'nand0,2' setenv preboot_nc 'run if_netconsole start_netconsole' setenv scan_disk 'echo running scan_disk ...\; scan_done=0\; setenv scan_usb "usb start"\; setenv scan_ide "ide reset"\; setenv scan_mmc "mmc rescan"\; for dev in $devices\; do if test $scan_done -eq 0\; then echo Scan device $dev\; run scan_$dev\; for disknum in $disks\; do if test $scan_done -eq 0\; then echo device $dev $disknum:1\; if load $dev $disknum:1 $load_uimage_addr /boot/uImage 1\; then scan_done=1\; echo Found bootable drive on $dev $disknum\; setenv device $disknum:1\; setenv bootdev $dev\; fi\; fi\; done\; fi\;' done setenv serverip '192.168.xx.xx' setenv set_bootargs 'setenv bootargs console=ttyS0,115200 root=LABEL=rootfs rootdelay=10 $mtdparts $custom_params' setenv start_netconsole 'setenv ncip $serverip\; setenv bootdelay 10\; setenv stdin nc\; setenv stdout nc\; setenv stderr nc\; version\;' setenv stderr serial setenv stdin serial setenv stdout serial setenv uenv_addr 0x810000 setenv uenv_import echo importing envs ...\; env import -t $uenv_addr $filesize setenv uenv_init_devices 'setenv init_usb "usb start"\; setenv init_ide "ide reset"\; setenv init_mmc "mmc rescan"\; for devtype in $devices\; do run init_$devtype\; done\;' setenv uenv_load 'run uenv_init_devices\; setenv uenv_loaded 0\; for devtype in $devices\; do for disknum in 0\; do run uenv_read_disk\; done\; done\;' setenv uenv_read_disk 'if test $devtype -eq mmc\; then if $devtype part\; then run uenv_read\; fi\; else if $devtype part $disknum\; then run uenv_read\; fi\; fi' setenv uenv_read 'echo loading envs from $devtype $disknum ...\; if load $devtype $disknum:1 $uenv_addr /boot/uEnv.txt\; then setenv uenv_loaded 1\; fi' setenv usb_ready_retry 15
DockStar> saveenv
Saving Environment to NAND...
Erasing NAND...
Erasing at 0xc0000 -- 100% complete.
Writing to NAND... OK
DockStar>
U-Boot 2017.07-tld-1 (Oct 24 2017 - 22:32:36 -0700) Seagate FreeAgent DockStar SoC: Kirkwood 88F6281_A0 DRAM: 128 MiB WARNING: Caches not enabled NAND: 256 MiB In: serial Out: serial Err: serial Net: egiga0 88E1116 Initialized on egiga0
Re: HOW2: Repair Pogo E02 with Raspberry PI (1,2 or 3) JTAG and OpenOCD October 16, 2018 06:45PM |
Admin Registered: 13 years ago Posts: 19,102 |
Martin from Dortmund
Re: HOW2: Repair Pogo E02 with Raspberry PI (1,2 or 3) JTAG and OpenOCD October 17, 2018 12:38AM |
Re: HOW2: Repair Pogo E02 with Raspberry PI (1,2 or 3) JTAG and OpenOCD October 17, 2018 01:59AM |
Admin Registered: 13 years ago Posts: 19,102 |
Quote
WARNING: Caches not enabled
Re: HOW2: Repair Pogo E02 with Raspberry PI (1,2 or 3) JTAG and OpenOCD November 24, 2018 04:07AM |
Registered: 6 years ago Posts: 13 |
root@raspberrypi:~# openocd -f pogo.cfg Open On-Chip Debugger 0.10.0+dev-00581-g1b864d6e (2018-11-24-00:25) Licensed under GNU GPL v2 For bug reports, read http://openocd.org/doc/doxygen/bugs.html BCM2835 GPIO config: tck = 11, tms = 25, tdi = 10, tdo = 9 BCM2835 GPIO nums: swclk = 25, swdio = 24 BCM2835 GPIO config: trst = 7 trst_only separate trst_push_pull adapter speed: 200 kHz adapter_nsrst_delay: 500 Info : auto-selecting first available session transport "jtag". To override use 'transport select <transport>'. trst_and_srst separate srst_gates_jtag trst_push_pull srst_open_drain connect_deassert_srst adapter_nsrst_delay: 200 jtag_ntrst_delay: 200 dcc downloads are enabled Warn : use 'feroceon.cpu' as target identifier, not '0' pogo_load_uboot Info : Listening on port 6666 for tcl connections Info : Listening on port 4444 for telnet connections Info : BCM2835 GPIO JTAG/SWD bitbang driver Info : JTAG and SWD modes enabled Info : clock speed 200 kHz Info : JTAG tap: feroceon.cpu tap/device found: 0x20a023d3 (mfg: 0x1e9 (Marvell Semiconductors), part: 0x0a02, ver: 0x2) Info : Embedded ICE version 0 Info : feroceon.cpu: hardware has 1 breakpoint/watchpoint unit Info : Listening on port 3333 for gdb connections Info : accepting 'telnet' connection on tcp/4444 Info : Halt timed out, wake up GDB. Error: timed out while waiting for target halted
# Pogoplug E02 # modification joerg_999 14.03.2016 # use this pogo.cfg taken from sheevaplug to use with Raspi direct or Buspirate jtag adapter # use raspberrypi-native mode # we use the Pins from SPI Interface (violett) 19,21,23,26 and 22, + 20 for GND # see GPIO schematic Raspi Raspi GPIO # source [find interface/buspirate.cfg] # source [find interface/sysfsgpio-raspberrypi.cfg] source [find interface/raspberrypi123-native.cfg] source [find target/feroceon.cfg] $_TARGETNAME configure \ -work-area-phys 0x10000000 \ -work-area-size 65536 \ -work-area-backup 0 arm7_9 dcc_downloads enable # this assumes the hardware default peripherals location before u-Boot moves it set _FLASHNAME $_CHIPNAME.flash nand device $_FLASHNAME orion 0 0xd8000000 proc pogo_init { } { # We need to assert DBGRQ while holding nSRST down. # However DBGACK will be set only when nSRST is released. # Furthermore, the JTAG interface doesn't respond at all when # the CPU is in the WFI (wait for interrupts) state, so it is # possible that initial tap examination failed. So let's # re-examine the target again here when nSRST is asserted which # should then succeed. jtag_reset 0 1 feroceon.cpu arp_examine halt 0 jtag_reset 0 0 wait_halt arm mcr 15 0 0 1 0 0x00052078 mww 0xD0001400 0x43000C30 ;# DDR SDRAM Configuration Register mww 0xD0001404 0x39543000 ;# Dunit Control Low Register mww 0xD0001408 0x22125451 ;# DDR SDRAM Timing (Low) Register mww 0xD000140C 0x00000833 ;# DDR SDRAM Timing (High) Register mww 0xD0001410 0x000000CC ;# DDR SDRAM Address Control Register mww 0xD0001414 0x00000000 ;# DDR SDRAM Open Pages Control Register mww 0xD0001418 0x00000000 ;# DDR SDRAM Operation Register mww 0xD000141C 0x00000C52 ;# DDR SDRAM Mode Register mww 0xD0001420 0x00000042 ;# DDR SDRAM Extended Mode Register mww 0xD0001424 0x0000F17F ;# Dunit Control High Register mww 0xD0001428 0x00085520 ;# Dunit Control High Register mww 0xD000147c 0x00008552 ;# Dunit Control High Register mww 0xD0001504 0x0FFFFFF1 ;# CS0n Size Register mww 0xD0001508 0x10000000 ;# CS1n Base Register mww 0xD000150C 0x0FFFFFF5 ;# CS1n Size Register mww 0xD0001514 0x00000000 ;# CS2n Size Register mww 0xD000151C 0x00000000 ;# CS3n Size Register mww 0xD0001494 0x003C0000 ;# DDR2 SDRAM ODT Control (Low) Register mww 0xD0001498 0x00000000 ;# DDR2 SDRAM ODT Control (High) REgister mww 0xD000149C 0x0000F80F ;# DDR2 Dunit ODT Control Register mww 0xD0001480 0x00000001 ;# DDR SDRAM Initialization Control Register mww 0xD0020204 0x00000000 ;# Main IRQ Interrupt Mask Register mww 0xD0020204 0x00000000 ;# " mww 0xD0020204 0x00000000 ;# " mww 0xD0020204 0x00000000 ;# " mww 0xD0020204 0x00000000 ;# " mww 0xD0020204 0x00000000 ;# " mww 0xD0020204 0x00000000 ;# " mww 0xD0020204 0x00000000 ;# " mww 0xD0020204 0x00000000 ;# " mww 0xD0020204 0x00000000 ;# " mww 0xD0020204 0x00000000 ;# " mww 0xD0020204 0x00000000 ;# " mww 0xD0020204 0x00000000 ;# " mww 0xD0020204 0x00000000 ;# " mww 0xD0020204 0x00000000 ;# " mww 0xD0020204 0x00000000 ;# " mww 0xD0020204 0x00000000 ;# " mww 0xD0020204 0x00000000 ;# " mww 0xD0020204 0x00000000 ;# " mww 0xD0020204 0x00000000 ;# " mww 0xD0020204 0x00000000 ;# " mww 0xD0020204 0x00000000 ;# " mww 0xD0020204 0x00000000 ;# " mww 0xD0020204 0x00000000 ;# " mww 0xD0020204 0x00000000 ;# " mww 0xD0020204 0x00000000 ;# " mww 0xD0020204 0x00000000 ;# " mww 0xD0020204 0x00000000 ;# " mww 0xD0020204 0x00000000 ;# " mww 0xD0020204 0x00000000 ;# " mww 0xD0020204 0x00000000 ;# " mww 0xD0020204 0x00000000 ;# " mww 0xD0020204 0x00000000 ;# " mww 0xD0020204 0x00000000 ;# " mww 0xD0020204 0x00000000 ;# " mww 0xD0020204 0x00000000 ;# " mww 0xD0020204 0x00000000 ;# " mww 0xD0010000 0x01111111 ;# MPP 0 to 7 mww 0xD0010004 0x11113322 ;# MPP 8 to 15 mww 0xD0010008 0x00001111 ;# MPP 16 to 23 mww 0xD0010418 0x003E07CF ;# NAND Read Parameters REgister mww 0xD001041C 0x000F0F0F ;# NAND Write Parameters Register mww 0xD0010470 0x01C7D943 ;# NAND Flash Control Register } proc pogo_reflash_uboot { } { # reflash the u-Boot binary and reboot into it pogo_init nand probe 0 nand erase 0 0x0 0xa0000 nand write 0 uboot.kwb 0 oob_softecc_kw resume } proc pogo_reflash_uboot_env { } { # reflash the u-Boot environment variables area pogo_init nand probe 0 nand erase 0 0xc0000 0x20000 nand write 0 uboot-env.bin 0xc0000 oob_softecc_kw resume } proc pogo_load_uboot { } { # load u-Boot into RAM and execute it pogo_init load_image uboot.kwb verify_image uboot.kwb resume 0x800200 }
Re: HOW2: Repair Pogo E02 with Raspberry PI (1,2 or 3) JTAG and OpenOCD November 24, 2018 05:27AM |
Admin Registered: 13 years ago Posts: 19,102 |
load_image uboot.kwb
nand write 0 uboot-env.bin 0xc0000 oob_softecc_kw
mww 0xD0001400 0x43000C30 ;# DDR SDRAM Configuration Register mww 0xD0001404 0x39543000 ;# Dunit Control Low Register mww 0xD0001408 0x22125451 ;# DDR SDRAM Timing (Low) Register mww 0xD000140C 0x00000833 ;# DDR SDRAM Timing (High) Register mww 0xD0001410 0x000000CC ;# DDR SDRAM Address Control Register mww 0xD0001414 0x00000000 ;# DDR SDRAM Open Pages Control Register mww 0xD0001418 0x00000000 ;# DDR SDRAM Operation Register mww 0xD000141C 0x00000C52 ;# DDR SDRAM Mode Register mww 0xD0001420 0x00000042 ;# DDR SDRAM Extended Mode Register mww 0xD0001424 0x0000F17F ;# Dunit Control High Register mww 0xD0001428 0x00085520 ;# Dunit Control High Register mww 0xD000147c 0x00008552 ;# Dunit Control High Register mww 0xD0001504 0x0FFFFFF1 ;# CS0n Size Register mww 0xD0001508 0x10000000 ;# CS1n Base Register mww 0xD000150C 0x0FFFFFF5 ;# CS1n Size Register mww 0xD0001514 0x00000000 ;# CS2n Size Register mww 0xD000151C 0x00000000 ;# CS3n Size Register mww 0xD0001494 0x003C0000 ;# DDR2 SDRAM ODT Control (Low) Register mww 0xD0001498 0x00000000 ;# DDR2 SDRAM ODT Control (High) REgister mww 0xD000149C 0x0000F80F ;# DDR2 Dunit ODT Control Register mww 0xD0001480 0x00000001 ;# DDR SDRAM Initialization Control Register mww 0xD0020204 0x00000000 ;# Main IRQ Interrupt Mask Register mww 0xD0020204 0x00000000 ;# " mww 0xD0020204 0x00000000 ;# " mww 0xD0020204 0x00000000 ;# " mww 0xD0020204 0x00000000 ;# " mww 0xD0020204 0x00000000 ;# " mww 0xD0020204 0x00000000 ;# " mww 0xD0020204 0x00000000 ;# " mww 0xD0020204 0x00000000 ;# " mww 0xD0020204 0x00000000 ;# " mww 0xD0020204 0x00000000 ;# " mww 0xD0020204 0x00000000 ;# " mww 0xD0020204 0x00000000 ;# " mww 0xD0020204 0x00000000 ;# " mww 0xD0020204 0x00000000 ;# " mww 0xD0020204 0x00000000 ;# " mww 0xD0020204 0x00000000 ;# " mww 0xD0020204 0x00000000 ;# " mww 0xD0020204 0x00000000 ;# " mww 0xD0020204 0x00000000 ;# " mww 0xD0020204 0x00000000 ;# " mww 0xD0020204 0x00000000 ;# " mww 0xD0020204 0x00000000 ;# " mww 0xD0020204 0x00000000 ;# " mww 0xD0020204 0x00000000 ;# " mww 0xD0020204 0x00000000 ;# " mww 0xD0020204 0x00000000 ;# " mww 0xD0020204 0x00000000 ;# " mww 0xD0020204 0x00000000 ;# " mww 0xD0020204 0x00000000 ;# " mww 0xD0020204 0x00000000 ;# " mww 0xD0020204 0x00000000 ;# " mww 0xD0020204 0x00000000 ;# " mww 0xD0020204 0x00000000 ;# " mww 0xD0020204 0x00000000 ;# " mww 0xD0020204 0x00000000 ;# " mww 0xD0020204 0x00000000 ;# " mww 0xD0010000 0x01111111 ;# MPP 0 to 7 mww 0xD0010004 0x11113322 ;# MPP 8 to 15 mww 0xD0010008 0x00001111 ;# MPP 16 to 23 mww 0xD0010418 0x003E07CF ;# NAND Read Parameters REgister mww 0xD001041C 0x000F0F0F ;# NAND Write Parameters Register mww 0xD0010470 0x01C7D943 ;# NAND Flash Control Register
Re: HOW2: Repair Pogo E02 with Raspberry PI (1,2 or 3) JTAG and OpenOCD November 24, 2018 07:44AM |
Registered: 6 years ago Posts: 13 |
root@raspberrypi:~# openocd -f pogo.cfg Open On-Chip Debugger 0.10.0+dev-00581-g1b864d6e (2018-11-24-00:25) Licensed under GNU GPL v2 For bug reports, read http://openocd.org/doc/doxygen/bugs.html BCM2835 GPIO config: tck = 11, tms = 25, tdi = 10, tdo = 9 BCM2835 GPIO nums: swclk = 25, swdio = 24 BCM2835 GPIO config: trst = 7 trst_only separate trst_push_pull adapter speed: 200 kHz adapter_nsrst_delay: 500 Info : auto-selecting first available session transport "jtag". To override use 'transport select <transport>'. trst_and_srst separate srst_gates_jtag trst_push_pull srst_open_drain connect_deassert_srst adapter_nsrst_delay: 200 jtag_ntrst_delay: 200 Warn : use 'feroceon.cpu' as target identifier, not '0' pogo_load_uboot Info : Listening on port 6666 for tcl connections Info : Listening on port 4444 for telnet connections Info : BCM2835 GPIO JTAG/SWD bitbang driver Info : JTAG and SWD modes enabled Info : clock speed 200 kHz Info : JTAG tap: feroceon.cpu tap/device found: 0x20a023d3 (mfg: 0x1e9 (Marvell Semiconductors), part: 0x0a02, ver: 0x2) Info : Embedded ICE version 0 Info : feroceon.cpu: hardware has 1 breakpoint/watchpoint unit Info : Listening on port 3333 for gdb connections
root@raspberrypi:~# nc localhost 4444 ��������Open On-Chip Debugger > halt halt Halt timed out, wake up GDB. timed out while waiting for target halted >
root@raspberrypi:~# cat /usr/share/openocd/scripts/board/pogo.cfg # Pogoplug E02 # modification joerg_999 14.03.2016 # use this pogo.cfg taken from sheevaplug to use with Raspi direct or Buspirate jtag adapter # use raspberrypi-native mode # we use the Pins from SPI Interface (violett) 19,21,23,26 and 22, + 20 for GND # see GPIO schematic Raspi Raspi GPIO # source [find interface/buspirate.cfg] # source [find interface/sysfsgpio-raspberrypi.cfg] source [find interface/raspberrypi123-native.cfg] source [find target/feroceon.cfg] $_TARGETNAME configure \ -work-area-phys 0x10000000 \ -work-area-size 65536 \ -work-area-backup 0 #arm7_9 dcc_downloads enable # this assumes the hardware default peripherals location before u-Boot moves it set _FLASHNAME $_CHIPNAME.flash nand device $_FLASHNAME orion 0 0xd8000000 proc pogo_init { } { # We need to assert DBGRQ while holding nSRST down. # However DBGACK will be set only when nSRST is released. # Furthermore, the JTAG interface doesn't respond at all when # the CPU is in the WFI (wait for interrupts) state, so it is # possible that initial tap examination failed. So let's # re-examine the target again here when nSRST is asserted which # should then succeed. jtag_reset 0 1 feroceon.cpu arp_examine halt 0 jtag_reset 0 0 wait_halt arm mcr 15 0 0 1 0 0x00052078 mww 0xD0001400 0x43000C30 ;# DDR SDRAM Configuration Register mww 0xD0001404 0x37543000 ;# Dunit Control Low Register mww 0xD0001408 0x22125451 ;# DDR SDRAM Timing (Low) Register mww 0xD000140C 0x00000833 ;# DDR SDRAM Timing (High) Register mww 0xD0001410 0x00000099 ;# DDR SDRAM Address Control Register mww 0xD0001414 0x00000000 ;# DDR SDRAM Open Pages Control Register mww 0xD0001418 0x00000000 ;# DDR SDRAM Operation Register mww 0xD000141C 0x00000C52 ;# DDR SDRAM Mode Register mww 0xD0001420 0x00000004 ;# DDR SDRAM Extended Mode Register mww 0xD0001424 0x0000F17F ;# Dunit Control High Register mww 0xD0001428 0x00085520 ;# Dunit Control High Register mww 0xD000147c 0x00008552 ;# Dunit Control High Register mww 0xD0001500 0x00000000 ;# CS[0]n Base address to 0x0 mww 0xD0001504 0x03FFFFF1 ;# CS0n Size Register mww 0xD0001508 0x04000000 ;# CS1n Base Register mww 0xD000150C 0x03FFFFF5 ;# CS1n Size Register mww 0xD0001514 0x00000000 ;# CS2n Size Register mww 0xD000151C 0x00000000 ;# CS3n Size Register mww 0xD0001494 0x00120012 ;# DDR2 SDRAM ODT Control (Low) Register mww 0xD0001498 0x00000000 ;# DDR2 SDRAM ODT Control (High) REgister mww 0xD000149C 0x0000E40F ;# DDR2 Dunit ODT Control Register mww 0xD0001480 0x00000001 ;# DDR SDRAM Initialization Control Register mww 0xD0020204 0x00000000 ;# Main IRQ Interrupt Mask Register mww 0xD0020204 0x00000000 ;# " mww 0xD0020204 0x00000000 ;# " mww 0xD0020204 0x00000000 ;# " mww 0xD0020204 0x00000000 ;# " mww 0xD0020204 0x00000000 ;# " mww 0xD0020204 0x00000000 ;# " mww 0xD0020204 0x00000000 ;# " mww 0xD0020204 0x00000000 ;# " mww 0xD0020204 0x00000000 ;# " mww 0xD0020204 0x00000000 ;# " mww 0xD0020204 0x00000000 ;# " mww 0xD0020204 0x00000000 ;# " mww 0xD0020204 0x00000000 ;# " mww 0xD0020204 0x00000000 ;# " mww 0xD0020204 0x00000000 ;# " mww 0xD0020204 0x00000000 ;# " mww 0xD0020204 0x00000000 ;# " mww 0xD0020204 0x00000000 ;# " mww 0xD0020204 0x00000000 ;# " mww 0xD0020204 0x00000000 ;# " mww 0xD0020204 0x00000000 ;# " mww 0xD0020204 0x00000000 ;# " mww 0xD0020204 0x00000000 ;# " mww 0xD0020204 0x00000000 ;# " mww 0xD0020204 0x00000000 ;# " mww 0xD0020204 0x00000000 ;# " mww 0xD0020204 0x00000000 ;# " mww 0xD0020204 0x00000000 ;# " mww 0xD0020204 0x00000000 ;# " mww 0xD0020204 0x00000000 ;# " mww 0xD0020204 0x00000000 ;# " mww 0xD0020204 0x00000000 ;# " mww 0xD0020204 0x00000000 ;# " mww 0xD0020204 0x00000000 ;# " mww 0xD0020204 0x00000000 ;# " mww 0xD0020204 0x00000000 ;# " mww 0xD0010000 0x01111111 ;# MPP 0 to 7 mww 0xD0010004 0x11113322 ;# MPP 8 to 15 mww 0xD0010008 0x00001111 ;# MPP 16 to 23 mww 0xD0010418 0x003E07CF ;# NAND Read Parameters REgister mww 0xD001041C 0x000F0F0F ;# NAND Write Parameters Register mww 0xD0010470 0x01C7D943 ;# NAND Flash Control Register } proc pogo_reflash_uboot { } { # reflash the u-Boot binary and reboot into it pogo_init nand probe 0 nand erase 0 0x0 0xa0000 nand write 0 uboot.kwb 0 oob_softecc_kw resume } proc pogo_reflash_uboot_env { } { # reflash the u-Boot environment variables area pogo_init nand probe 0 nand erase 0 0xc0000 0x20000 nand write 0 uboot-env.bin 0xc0000 oob_softecc_kw resume } proc pogo_load_uboot { } { # load u-Boot into RAM and execute it pogo_init load_image uboot.kwb verify_image uboot.kwb resume 0x800200 }
Re: HOW2: Repair Pogo E02 with Raspberry PI (1,2 or 3) JTAG and OpenOCD November 24, 2018 04:58PM |
Admin Registered: 13 years ago Posts: 19,102 |
Re: HOW2: Repair Pogo E02 with Raspberry PI (1,2 or 3) JTAG and OpenOCD November 26, 2018 04:11AM |
Registered: 10 years ago Posts: 94 |
Re: HOW2: Repair Pogo E02 with Raspberry PI (1,2 or 3) JTAG and OpenOCD December 10, 2019 09:42PM |
Registered: 11 years ago Posts: 18 |
Quote
raspberrypi>openocd -f pogo.cfg
Open On-Chip Debugger 0.10.0+dev-00974-g678fb4f6 (2019-12-10-15:24)
Licensed under GNU GPL v2
For bug reports, read
http://openocd.org/doc/doxygen/bugs.html
Info : auto-selecting first available session transport "jtag". To override use 'transport select <transport>'.
Warn : use 'feroceon.cpu' as target identifier, not '0'
pogo_load_uboot
Info : Listening on port 6666 for tcl connections
Info : Listening on port 4444 for telnet connections
Info : BCM2835 GPIO JTAG/SWD bitbang driver
Info : JTAG and SWD modes enabled
Info : clock speed 200 kHz
Info : JTAG tap: feroceon.cpu tap/device found: 0x20a023d3 (mfg: 0x1e9 (Marvell Semiconductors), part: 0x0a02, ver: 0x2)
Info : Embedded ICE version 0
Info : feroceon.cpu: hardware has 1 breakpoint/watchpoint unit
Info : Listening on port 3333 for gdb connections
Info : accepting 'telnet' connection on tcp/4444
requesting target halt and executing a soft reset
target halted in ARM state due to debug-request, current mode: Supervisor
cpsr: 0xa00000d3 pc: 0x00000000
MMU: disabled, D-Cache: disabled, I-Cache: disabled
Error: timed out while waiting for target halted
Error: error executing hosted NAND write
Error: Unable to write data to NAND device
failed writing file uboot.kwb to NAND flash 0 at offset 0x00000000
============================================
raspberrypi>telnet localhost 4444
Trying 127.0.0.1...
Connected to localhost.
Escape character is '^]'.
Open On-Chip Debugger
> pogo_init
> soft_reset_halt
requesting target halt and executing a soft reset
target halted in ARM state due to debug-request, current mode: Supervisor
cpsr: 0xa00000d3 pc: 0x00000000
MMU: disabled, D-Cache: disabled, I-Cache: disabled
> pogo_init
> nand probe 0
NAND flash device 'NAND 128MiB 3.3V 8-bit (Hynix)' found
> nand erase 0 0x0 0xa0000
erased blocks 0 to 4 on NAND flash device #0 'NAND 128MiB 3.3V 8-bit'
> nand write 0 uboot.kwb 0 oob_softecc_kw
timed out while waiting for target halted
error executing hosted NAND write
Unable to write data to NAND device
failed writing file uboot.kwb to NAND flash 0 at offset 0x00000000
Quote
raspberrypi>openocd -f pogo.cfg
Open On-Chip Debugger 0.10.0+dev-00974-g678fb4f6 (2019-12-10-15:24)
Licensed under GNU GPL v2
For bug reports, read
http://openocd.org/doc/doxygen/bugs.html
Info : auto-selecting first available session transport "jtag". To override use 'transport select <transport>'.
Warn : use 'feroceon.cpu' as target identifier, not '0'
pogo_load_uboot
Info : Listening on port 6666 for tcl connections
Info : Listening on port 4444 for telnet connections
Info : BCM2835 GPIO JTAG/SWD bitbang driver
Info : JTAG and SWD modes enabled
Info : clock speed 200 kHz
Info : JTAG tap: feroceon.cpu tap/device found: 0x20a023d3 (mfg: 0x1e9 (Marvell Semiconductors), part: 0x0a02, ver: 0x2)
Info : Embedded ICE version 0
Info : feroceon.cpu: hardware has 1 breakpoint/watchpoint unit
Info : Listening on port 3333 for gdb connections
Info : accepting 'telnet' connection on tcp/4444
target halted in Thumb state due to debug-request, current mode: Supervisor
cpsr: 0x400000f3 pc: 0xffff0a42
MMU: enabled, D-Cache: enabled, I-Cache: enabled
requesting target halt and executing a soft reset
target halted in ARM state due to debug-request, current mode: Supervisor
cpsr: 0x400000d3 pc: 0x00000000
MMU: disabled, D-Cache: disabled, I-Cache: disabled
===========================================
raspberrypi>telnet localhost 4444
Trying 127.0.0.1...
Connected to localhost.
Escape character is '^]'.
Open On-Chip Debugger
> pogo_init
target halted in Thumb state due to debug-request, current mode: Supervisor
cpsr: 0x400000f3 pc: 0xffff0a42
MMU: enabled, D-Cache: enabled, I-Cache: enabled
> soft_reset_halt
requesting target halt and executing a soft reset
target halted in ARM state due to debug-request, current mode: Supervisor
cpsr: 0x400000d3 pc: 0x00000000
MMU: disabled, D-Cache: disabled, I-Cache: disabled
> pogo_init
> load_image uboot.kwb
524288 bytes written at address 0x00000000
downloaded 524288 bytes in 62.109913s (8.243 KiB/s)
> verify_image uboot.kwb
verified 524288 bytes in 1.868883s (273.960 KiB/s)
> resume 0x800200
>
^^^^^^^^^ Nothing happens. Uboot does not start. Nothing on serial console. ^^^^^^^^^^^^^^^^^^^^
Re: HOW2: Repair Pogo E02 with Raspberry PI (1,2 or 3) JTAG and OpenOCD December 11, 2019 12:59AM |
Admin Registered: 13 years ago Posts: 19,102 |
Re: HOW2: Repair Pogo E02 with Raspberry PI (1,2 or 3) JTAG and OpenOCD December 11, 2019 02:47PM |
Registered: 11 years ago Posts: 18 |
Quote
> load_image uboot.kwb
524288 bytes written at address 0x00000000
downloaded 524288 bytes in 62.109913s (8.243 KiB/s)
> verify_image uboot.kwb
verified 524288 bytes in 1.868883s (273.960 KiB/s)
> resume 0x800200
>
Re: HOW2: Repair Pogo E02 with Raspberry PI (1,2 or 3) JTAG and OpenOCD December 11, 2019 06:20PM |
Admin Registered: 13 years ago Posts: 19,102 |
Re: HOW2: Repair Pogo E02 with Raspberry PI (1,2 or 3) JTAG and OpenOCD December 12, 2019 04:49PM |
Admin Registered: 13 years ago Posts: 19,102 |
Re: HOW2: Repair Pogo E02 with Raspberry PI (1,2 or 3) JTAG and OpenOCD December 18, 2019 06:21AM |
Registered: 10 years ago Posts: 94 |
> pogo_init > soft_reset_halt # normaly it works without, if it fails, press reset button on Pogo # You normally get this event (the important thing is the status "ARM state"): # target state: halted # target halted in ARM state due to debug-request, current mode: Supervisor ## OK # cpsr: 0x000000d3 pc: 0xffff0000 # MMU: disabled, D-Cache: disabled, I-Cache: disabled # If you get the following output, again: # target state: halted # target halted in Thumb state due to debug-request, current mode: Supervisor ## not OK ! # cpsr: 0x200000f3 pc: 0xffff0a8a # MMU: enabled, D-Cache: enabled, I-Cache: enabled # T2 Is initialized with the command:
# T2 We verify that the nand is well recognized: > nand probe 0 # NAND flash device 'NAND 128MiB 3.3V 8-bit (Hynix)' found ## OK # T2 If you see this output, start from the beginning: > nand probe 0 # unknown NAND flash device found, manufacturer id: 0x00 device id: 0x00 ## not OK! # in procedure 'nand'
## download uboot Pogo E02 and create Symlink: wget -c www.dropbox.com/s/vgbshmiq3o14btp/uboot.2017.07-tld-1.pogo_e02.bodhi.tar tar -xf uboot.2017.07-tld-1.pogo_e02.bodhi.tar ln -s uboot.2017.07-tld-1.pogo_e02.mtd0.kwb uboot.kwb ## download u-boot envs and create Symlink: wget -c www.dropbox.com/s/4smmw2wr4ugayz9/uboot.2016.05-tld-1.environment.bodhi.tar tar -xf uboot.2016.05-tld-1.environment.bodhi.tar ln -s uboot.2016.05-tld-1.environment.img uboot-env.bin
Re: HOW2: Repair Pogo E02 with Raspberry PI (1,2 or 3) JTAG and OpenOCD December 18, 2019 10:56AM |
Registered: 11 years ago Posts: 18 |
Re: HOW2: Repair Pogo E02 with Raspberry PI (1,2 or 3) JTAG and OpenOCD December 18, 2019 02:27PM |
Registered: 10 years ago Posts: 94 |
Re: HOW2: Repair Pogo E02 with Raspberry PI (1,2 or 3) JTAG and OpenOCD December 18, 2019 05:18PM |
Registered: 7 years ago Posts: 375 |